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S/PDIF termination; practical guide?
S/PDIF termination; practical guide?
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Old 5th September 2011, 02:29 PM   #41
marce is offline marce  United Kingdom
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S/PDIF termination; practical guide?
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Old 5th September 2011, 02:51 PM   #42
infinia is offline infinia  United States
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Originally Posted by new2hifi View Post
Irene is still taking toll, electricity is random.

Thanks all for your help!

infinia, what would be the type and value of capacitor used in S/PDIF termination? I saw on Lampizator's website that he uses silver mica capacitor. So this capacitor is in series or across signal to return?

Also, this covers the termination at receiving end. How do we terminated the transmitting end starting from the chip on PCB?

The data sheet suggests 0.01 to 0.1 uF X7R caps. for conventional stereo 0.01 would be fine, the exact value is an RC time constant related to the bit depth or maximum time without logic transitions ( keeping the average value within trigger range) and good HF performance ie for keeping one bit signal fidelity (rise and fall times). SMD parts are usually a very good choice, big parts with long leads not as good, check the caps SRF. There are 2 caps on the receivers end, one DC block and the other bypassing the triggered DC reference. see the schematic diagram I posted above.

Transmitting end, using a stable series resistor is best.
Some designs for consumer stuff, ie SE coax, is not the most accurate, because it uses the Tx chips output impedance and sometimes a 2:1 transformer. it's output impedance is essentially an Rds (on) of a totem pole CMOS buffer raised by X2 also the specific transformer parasitics play a big role in HF response ie overshoot et al.. process and temperature variation of MOSFET's unfortunately becomes key in some of these topologies. EDIT> see Thevinin theorem for calculating various schemes.

Last edited by infinia; 5th September 2011 at 03:21 PM.
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