Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

Hi Ian


After elevating my DAC thanks to Your amazing FiFo into level I never expected... I have started to look at ways of improving rest of my system
and now I'm fighting with my speakers....
To make long story short, have question.
Any chance to have 2 of Your FiFo-Reclock set-ups running the same input I2S data but with ability to delay one FiFo output at some time, like 50-250us. Some way to run second FiFo in kind of "slave mode" with fixed time delay to "master".
Then of cause the same, but just time delayed I2S data goes to 2 DACs and 2 Amps.
I'm thinking about possibility of using Your FiFo to delay Tweeter to Midwoofer in loudspeaker.
Getting nice XO slopes and crossing points in loudspeakers are pretty easy, but getting "time coherent" is usually bit problematic in most loudspeaker designs.
Any possibility that this could be done with current FiFo hardware?

Best Regards
Rosendorfer

Hi Rosendorfer,

Glad to know your system got some boost from FIFO KIT.

I roughly understand your idea. The goal for FIFO is isolating two clocks domain, bypass the old clock and make it possible to introducing a new clock which might be much better than the old one, and at same time without changing any on the music.

The FIFO delay is a side effect, kind of disadvantages. Actually the amount of the delay is not a constant, it decided by FIFO depth, sample rate, as while as the real time difference between the two clocks.

The best way to generate determined delay with higher accuracy is using programmable delay chip which working within same clock domain. You can try some lips sync chip or so on, I believe you can find something you want.

You can use two FIFO after the delay sections to keep high sound quality, but you need use one clock board for both of the FIFO. Multi-channel would be better choice. But using the stereo FIFO is still possible. You need to figure out how to integrate them together.

Regards,

Ian
 
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i'm sure you could, but you would need to come up with the code ;)

To use the dual xo board, yes. Single XO will output MCLK continuously (Dual XO will output last clock used). So that could be used for RCLK on the reclocker, obviously.

The better question might be, why would you? For a separate DAC sure, but as a stage preceding the FIFO, it's a questionable undertaking in an already crowded enclosure ...
 
If you want synchronous re-clocking, you'll need to reverse engineer Ian's proprietary code for communicating between his FIFO and Dual XO board. If you are OK with Async re-clocking on Acko's board, use the single XO MCLK for RCLK on Acko's reclock board.

This is really a topic for another thread though. IMO Acko's boards that are designed for exactly that implementation, might be neater.
 
Si570 driver will partly open frequency control to third party external controller from a UART. The footprint of UART isolator is also reserved on the isolator board. Here is the protocol:

//Si570 multi-frequency clock board serial communication protocol V1.0 2012-11-03 by Ian
//USART 9600,n,8,1

//events sent from si570 driver
//Format: 0xAA,EVENT,DATA,0x55
//EVENTS:
#define GETNEWFS 0xC1 //FIFO detected a new Fs which need a new MCLK frequency
#define SETFRQ 0xC2 //new Si570 frequency is set
#define SETXFS 0xC3 //new xfs is set
#define WRONGINPUTCMD 0xC4 //wrong input commend or no input command
#define WRONGINPUTFRQ 0xC5 //input frequency is overange
#define INVALIDINPUTFRQ 0xC6 //input frequency is invalid for current Fs


//Command response from external controller
//Format: 0xA5,CMD,DATA,0x5A
//0xC8 command has to be sent within 100ms after getting event 0xC1,
//Otherwise Si570 driver will determine the setting frequency and xfs according to the preset without stop the music
//CMD:
#define TOINPUTFRQ 0xC8 //set frequency for the new detected Fs by external controller

//sample frequency data of event 0xC1,
//#define FS22 0
//#define FS24 1
//#define FS44 2
//#define FS48 3
//#define FS88 4
//#define FS96 5
//#define FS174 6
//#define FS192 7
//#define FS352 8
//#define FS384 9

//xfs data for event 0xC3
//#define XFS256 0
//#define XFS512 1
//#define XFS1024 2
//#define XFS2048 3

//frequency data for event 0xC2 and command 0xC8
//#define F112896 0
//#define F122880 1
//#define F225792 2
//#define F245760 3
//#define F451584 4
//#define F491520 5
//#define F903168 6
//#define F983040 7


Ian

Hi Ian

I am trying to read the sampling frequency from i570 and display it on GLCD. Is there any simple instruction to do it? I don't understand how to use your code.
 
Hi Ian

I am trying to read the sampling frequency from i570 and display it on GLCD. Is there any simple instruction to do it? I don't understand how to use your code.

There are no instructions, it's left as an exercise for us :)

Basically you need to connect serial port to the arduino, wait for the si570 to send a notification corresponding to what Ian's described, update the screen to reflect that.

I personally haven't got to writing that in arduino code yet, I will do it eventually, I've had other projects taking priority.

EDIT:
I haven't used/looked at glt's code for hifiduino so I can't be much more specific about where/how to do it in his code unfortunately.
 
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Hi

As could be that my English is readable, but from Your answers, I have feeling that I just did not have enough freedom/knowledge to convey my idea...
Well ..OK, let me do, just last try..

IN Simple …. I'm looking at ability of time control done in digital domain..... and rest of speaker control in old analogue way....


Again:

It is about having a bit perfect!!!, not re-sampled!!, jitter free!!! , actually untouched by DSP!!, signal chain, and being able, to do Time manipulation...

Now we do have analogue way of speaker "control" with few caps and inductors at hand and some woodwork to do loudspeaker right... or have to go with DSP, with all good and easy DSP things, but also..... well there are always some but's......
So...
Having ability of time delay control done in digital domain in way that signal is “unharmed”... possibly, could be very interesting for anyone trying to build speakers, without going DSP route.

And hire I'm just looking at Ian FiFo , as wonderful thing we have.
Because...FiFo Can Do Time delay, IT is doing it !!

But Again!! and Again!! :cool:
Not as FiFo with uncontrolled time behaviour but as Hardware that is done, ready and able of time delay.
But with NEW! firmware, to do programmable!! and controlled!! time delay of I2S stream.

Then of cause Second I2S stream would have to go to second synchronized!! with first Re-clocker ...as it “have to” go and it is intended do ..

I do not know if this is possible with current hardware and how much work it would take...but maybe, just maybe... it is possible !? And there would be No need to design and build new hardware.

But seems that as for now there is a rather question: not if it is possible? but more a question if that “Idea” could be interested or not, or maybe there is some major problem with it.

Most of Your answers goes: it is simple job for DSP....
Well, but there are still pretty strong and still going on “traditional” target out there...people that for any reason, nothing against DSP, just do not want use DSP...

Please have a look at MultiWay Loudspeaker forum , and see things there....
Bet that for many people there, possibly of having the ability of EASY and FREE playing "Time" with their speaker and still keeping their Gold-Silver-plated Delund Caps and 2kg Inductors, could be a "magic"...
Look at all the struggles that have to be done to get anything close to "Time Coherent" speaker, lot of people knowing what step response is, are looking at, horns, wave-guides, stepped baffles and asymmetric XO's....
Things easy can get pretty complicated and very expensive.

OK.. I know that “time delay” is not “full solutions”, and easy way to perfection, it is bit more complicated that that, but it would be absolutely valuable...

And as last thing:
MultiChanel FiFo I'm sure, will be real Ian "blessing" for DSP users...
But it is Not That Thing I'm talking about..... Well unless it will have implemented Time delay control between Chanels...on Its OWN Hardware and not rely on separate DSP processor.

OK I promise this was my last try...


Vox populi, vox Dei


Rosendorfer
 
we understood and answered you, both of us (hochopeper and I). Ian I dont think did quite understand though he did all the same give you an applicable answer, no way you reframe the question will change the hardware limitations

fifo is not doing time delay, it is delayed as a biproduct of what it is doing (it delays while it half fills the memory, which happens at a different rate depending on the exact samplerate ie. it happens synchronously as the data is clocked in). it is not a deliberate choice, or a controlled choice, just an unavoidable outcome

whos talking about a DSP processor? it could be done on DSP, though that is not what Chris and I were talking about. delaying one audio channel requires no resampling, no processing as such, it would be done on the computer and output as a second stereo channel with added delay. I must admit I have absolutely no idea what your objection is to doing something the easiest way with the most control (sample level), using tools that have already been designed for this exact purpose...
 
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no way you re-frame the question will change the hardware limitations
fifo is not doing time delay,

Dear qusp

I will have to disagree with You.....
There is No Hardware Limitation, FiFo HARDWARE Can do Time delay...

And starting easy way possibly can lead into trouble, just bit later....;)

If possible Please get through my lengthy mumbling...I have try to explain what and why really hard..

Rosendorfer
 
I did read what you wrote, it was just saying the exact same thing that we both knew you were saying in the first post....

you restated it another 2 times because you didnt like the answers...

when you start with

It is about having a bit perfect!!!, not re-sampled!!, jitter free!!! , actually untouched by DSP!!, signal chain, and being able, to do Time manipulation...
but then insist on avoiding using the best tool for this exact job, meeting these exact goals, while describing something convoluted that requires considerable work on somebody elses part, to do exactly the same thing!! well... my attention starts to fade



the fifo must half fill its buffer before starting to avoid buffer under/overun, it does not flush its buffer between songs, where exactly would you have this sample level control take place while sticking to your own goals above, for example, when the memory is filled with 2, or even 3 songs of different sample-rate?

Dear qusp

I will have to disagree with You.....
There is No Hardware Limitation, FiFo HARDWARE Can do Time delay...

And starting easy way possibly can lead into trouble, just bit later....;)

If possible Please get through my lengthy mumbling...I have try to explain what and why really hard..

Rosendorfer
 
I still think the easiest way to make steady time delay is a shift register just before the DAC.:smirk:
If you want different samperates, you could use a mux to chose witch output to use from the shift register and let the Fifo board manage the Mux. I believe you have data that tells you what the LRclk is (the led´s on the board), but I have not looked closely into this.
No need to reclock anything, as the delayed data is already "reclocked " out of the shift register.

There might be something I have overlooked, please correct me if I am wrong.:cannotbe:

Koldby
 
for sure, there are many external solutions, but surely their realization is the domain of those who want them ... The easiest solution has already been covered, but Rosendorfer has some irrational issue with doing the exact same process..on evil computers or DSPs, composed of the exact same type of logical parts... lets forget the belief that expensive capacitors are in any way linear...

the fifo is capable of 44.1->384khz, thats one hell of a mux, but i'm sure you could break it down into 44.1/48* plus a multiplier. it would on the surface seem something that could be achieved with the PCM daughterboard.
 
Hi

I'm absolutely agree with You!!
And that is almost exactly my "crazy"idea.:p
The only difference is that instead using MUX'es and other things,
I have been thinking, if if would not be possible to use FiFo Hardware with New Firmware!! to act JUST as "Buffer" with programmable length.
There is lot of memory and nice processor that possibly can communicate with Real FiFo and easily get current sample rate ..
All You would need to do simple programmable time shift...

But..well seems that is not catching up as I was thinking...

Rosendorfer.

I still think the easiest way to make steady time delay is a shift register just before the DAC.:smirk:
If you want different samperates, you could use a mux to chose witch output to use from the shift register and let the Fifo board manage the Mux. I believe you have data that tells you what the LRclk is (the led´s on the board), but I have not looked closely into this.
No need to reclock anything, as the delayed data is already "reclocked " out of the shift register.

There might be something I have overlooked, please correct me if I am wrong.:cannotbe:

Koldby