Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

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qusp

qusp

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Joined 2009
nope, Tom would be much more obvious if he was flaming me, he just happens to spend his days creating proofs with strings. of course now he mentions it ive seen/read this many times, but had math text/brain fail and dont mind admitting it when i do, doesnt make me feel stupid

and wow who woulda thunk it, 2 people among ~20million collide across teh interwebz...amazin.....
 
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iancanada

iancanada

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zinsula said:
Thank you Ian. This could well be an option, but if using an external clock, the "comfortable" automatic clock switching is lost.
Primarily, I'd plan to connect the FIFO to a multi format DVD player, which puts out both the 44.1 and the 48kHz - Family of sample rates.
But I'll take one...
Click to expand...

Hi zinsula,

Design a clock board for my fifo with automatically Fs switching function is easy. As I mentioned before, the fifo board is working at slave mode, the clock board is the master. The default MCK is 256Fs, so just desigen a clock board, output 11.2896MHz if I2S is 44.1K and 12.2880Mhz if I2S is 48K(your clock board should know which Fs it is). Anything else will be dealt with at background by fifo fpga/cpld. If MCK frequency is not match the I2S, the output of the fifo will be silenced automatically until right frequency is being fed. Just hope it works for your idea.

Good luck zinsula,

Ian
 
V

vzs

Member
Joined 2005
Lastly I will add my 18bit LSBJ converter board after the reclock kit and have some more questions before doing the pcb:
1. As the SCK output has to drive 11 gates on my converter board do I need a buffer like 74ACT125 or can the reclocked FIFO output source that many gates?
2. Can you tell me the Farnell code of the 7-pin PH 2.0mm connector + double-ended PH cable you are using as I couldn't find them.
3. I'm trying out the single clock board and plan to use it with 44.1KHz based stream. Can I use a 22.5792MHz clock (512*Fs) or do I have to stick with a 11.2896MHz one?

Thanks.
Zsolt
 
iancanada

iancanada

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vzs said:
Lastly I will add my 18bit LSBJ converter board after the reclock kit and have some more questions before doing the pcb:
1. As the SCK output has to drive 11 gates on my converter board do I need a buffer like 74ACT125 or can the reclocked FIFO output source that many gates?
2. Can you tell me the Farnell code of the 7-pin PH 2.0mm connector + double-ended PH cable you are using as I couldn't find them.
3. I'm trying out the single clock board and plan to use it with 44.1KHz based stream. Can I use a 22.5792MHz clock (512*Fs) or do I have to stick with a 11.2896MHz one?

Thanks.
Zsolt
Click to expand...

Hi Zsolt,
1.The max output current of the I2S signals from the clock board is LVTTL +-20mA, but 11 gates are too much for keeping low jitter performance. Suggest useing low jitter dedicate clock fanout buffer driving them. The one on the Dual XO clock board is one of the good choice, only 18fs additive jitter. Don't let AD1865 share clock driver with other load.

2. 7PIN PH2.0 Digikey P/N
455-1739-1-ND SMT
455-1709-ND through hole

U.FL cable
H11555-ND

U.FL socket
H11891CT-ND

3. The default master clock of the FIFO is 256Fs except other setting by the external mcu. So if you using the single clock board, you have to stick with 11.2896MHz for 44.1K. Changing the default to 512Fs is easy, I can re-program it for you if you want before defivery so that you can use the 22.5792M clk. The only thing is I don't have enought time doing the test for that special version.

Regards,
 
V

vzs

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Joined 2005
Hi Ian,
1. I reduced the number of gates requiring SCK to 8, all having max Icct of 1.5mA so 12mA in total. If the board can source 20mA don't you think that this can work without a buffer?
I'm also reclocking the LSBJ 18bit output with MCK so AD1865 should receive a clean clock. I will use a simple 74ACT374 to reclock which would add a max 1pS rms jitter, but I can live with that.

3. I will stick with the default 256*fs and create a small clock adapter to divide/2. If everything works fine will probably buy a dual clock board.
Thanks!
 
iancanada

iancanada

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vzs said:
Hi Ian,
1. I reduced the number of gates requiring SCK to 8, all having max Icct of 1.5mA so 12mA in total. If the board can source 20mA don't you think that this can work without a buffer?
I'm also reclocking the LSBJ 18bit output with MCK so AD1865 should receive a clean clock. I will use a simple 74ACT374 to reclock which would add a max 1pS rms jitter, but I can live with that.

3. I will stick with the default 256*fs and create a small clock adapter to divide/2. If everything works fine will probably buy a dual clock board.
Thanks!
Click to expand...

Hi Vzs,

That should be fine. I suspect you want to run the AD1865 at NOS mode. So, in this case, the clk signal of AD1865 is very immprotant, especially the jitter performance. If you could try to improve it, you will gain from the sound.
Good luck.
 
iancanada

iancanada

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chchyong89 said:
off topic, can i know the industry-standard specified "BER" for I2S signal?
Click to expand...

Hi chchyong89,
I2S standard didn't mention anything about BER. Usually I2S is just using for internal link, if there is any error, that would be very serious problem, shouldn't be happened.
or, maybe I didn't get what exactlly you mean.
Regards,
 
A

Adrculda

Member
Joined 2009
This thread has my attention that's for sure !

I wonder if there is any interest for a USB or HDMI interface...
This way all data can be fed directly into the buffer, then from the buffer into the DAC of your choice.

I personally think this maybe a good choice for those that want to use a PC or Laptop.
This way you basically offer a complete "front end" for those that are looking at a DIY input/buffer/clock for their DAC. Your greatest selling point so far is the fact that everything is a simple snap together.

Another question for you is for the HT guys...
What are the chances for a 8Ch unit ( 8Ch Sabre comes to mind here ) and HDMI audio comes to mind here as well

Thanks Ian...
 
iancanada

iancanada

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Joined 2009
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Adrculda said:
This thread has my attention that's for sure !

I wonder if there is any interest for a USB or HDMI interface...
This way all data can be fed directly into the buffer, then from the buffer into the DAC of your choice.

I personally think this maybe a good choice for those that want to use a PC or Laptop.
This way you basically offer a complete "front end" for those that are looking at a DIY input/buffer/clock for their DAC. Your greatest selling point so far is the fact that everything is a simple snap together.

Another question for you is for the HT guys...
What are the chances for a 8Ch unit ( 8Ch Sabre comes to mind here ) and HDMI audio comes to mind here as well

Thanks Ian...
Click to expand...

Hi Adrculda,
Very good suggestions. I'v been think about similar issuses for a quite a while. That might be my next project. :)
Thanks and have a good night.
Ian
 
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