Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 99 - diyAudio
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Old 15th September 2012, 05:50 PM   #981
qusp is offline qusp  Australia
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sweet!! done deal, for me (apart from multichannel =) thats the last piece of the puzzle, well just one more, transformer isolation of Mclk->Dac but thats easy enough to implement oneself. the man is quick as lightning!
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Old 15th September 2012, 07:43 PM   #982
vzs is offline vzs  Europe
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Nice indeed, done well I wish I can be half as fast as Ian is.
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Old 16th September 2012, 02:19 PM   #983
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Hi Ian

I connect the USB WaveIO to the FIFO via the SPDIF TTL input but doesn't work. No Lock on FIFO. I use scope to check the non-isolated SPDIF output of WaveIO and can see 5V TTL pulses. Any suggestion on trouble shooting?
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Old 16th September 2012, 05:07 PM   #984
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Quote:
Originally Posted by bigpandahk View Post
Hi Ian

I connect the USB WaveIO to the FIFO via the SPDIF TTL input but doesn't work. No Lock on FIFO. I use scope to check the non-isolated SPDIF output of WaveIO and can see 5V TTL pulses. Any suggestion on trouble shooting?
1, Please make sure the TTL s/pdif connections: signal to signal, gnd to gnd.
2, Please makse sure the button on the spdif board was pressed with TTL LED is lighting.

I confirmed this function without any problem by connecting to a s/pdif output of the CDROM.

Good luck.

Ian
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Old 16th September 2012, 11:37 PM   #985
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Any more progress on the project,
very interested in the results
james
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Old 17th September 2012, 03:54 AM   #986
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Quote:
Originally Posted by iancanada View Post
1, Please make sure the TTL s/pdif connections: signal to signal, gnd to gnd.
2, Please makse sure the button on the spdif board was pressed with TTL LED is lighting.

I confirmed this function without any problem by connecting to a s/pdif output of the CDROM.

Good luck.

Ian
Ian

Thanks for your reply. There is no mark on the PCB showing the polarity of the TTL input.
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Old 17th September 2012, 03:35 PM   #987
qusp is offline qusp  Australia
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check with multimeter, the TTL input isnt transformer isolated. the right hand pin when looking at the input is ground. also you can fairly easily spot it as ground by looking under the board, notice this pin is visibly connected to a ground plane.
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Old 17th September 2012, 04:28 PM   #988
cracra is offline cracra  France
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Default FIFO Latency Automatic Minimization

Hi Ian,

Would it be possible to minimize automatically the FIFO Latency (i.e. Minimize the number of PCM samples stored within the FIFO Memory) according to the sampling rate of the incoming Digital audio stream through I2S ?

The reason of my question is that I am using my DAC equipped with the FIFO to convert the audio stream of the movies I watch with my Blu Ray player. Currently the FIFO introduces roughly 2 seconds of latency between the image that is displayed and the associated movie dialogue or sound.

Thanks,
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Old 17th September 2012, 04:39 PM   #989
zinsula is offline zinsula  Switzerland
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You'll still need a delay as your clocks will hardly be that equal to allow for very small buffers, i.e. small latency.
To me, even quite small latency is somehow irritating.
Unfortunately, my Video Player does only allow for an added delay of the sound, and not vice versa.

You need a video FIFO, a "latencizer"
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Old 17th September 2012, 05:18 PM   #990
qusp is offline qusp  Australia
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simple answer, no, the best you can do without delaying the video and still using fifo would be to upsample everything to 384khz so it doesnt take as long to fill the buffer. its part and parcel of fifo, being that its a buffer, to have a delay … Without a way to delay the video, its an unwise choice for a video system
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