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Old 28th August 2012, 01:30 AM   #881
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Default The Si570 based clock board is working now

The prototype of Si570 based clock board is working now. It’s generating the frequencies I want. For DAC applications, now it could be 11.2896, 12.2880, 22.5792, 24.5760, 45.1584, 49.1520, 90.3168 and 98.3040 MHz.

At high frequency mode which designed especially for ESS9018, the output frequency will be fixed at 90.3168 and 98.3040 MHz. The *Fs range will be from 256*Fs to 2048*Fs corresponding to 44.1Khz to 384KHz.

At low frequency mode for classical DAC, the MCLK will be changed automatically from 11.2896 to 49.1520 MHZ corresponding to 44.1KHz to 192KHz with *Fs fixed at 256*Fs.

The next step, I’ll run this Si570 based FIFO KIT with ESS9018 BIII at sync mode on 90.3168 and 98.3040 MHz.

Ian
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File Type: jpg Si570Counting.JPG (370.5 KB, 478 views)
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Last edited by iancanada; 28th August 2012 at 01:32 AM.
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Old 30th August 2012, 01:50 AM   #882
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Default Any possible to stack the clock board on top of the FIFO board?

The FIFO KIT wasnít designed this way originally. But to stack the clock board on top of the FIFO board will save a great deal of space, especially for a small DAC case. So, I was wondering is there any possible?

I realized both FIFO board and the clock board have same pitch of mounting holes on vertical side. So I ordered some 6Ē FPC/FFC cables. I did a try today, the answer now is YES! It looks just nice. Two standoffs assembled throughout the base feet. Another standoff could be a support for there is no mound hole underneath. The last mounting hole on the clock board has to be left open. Some components right over there.

I donít think a 6Ē FPC/FFC cable gonna be any problem for the clock signal. But I have to confirm, at least for high Fs applications such as 384 KHz.

Ian
Attached Images
File Type: jpg StackUp1.JPG (395.1 KB, 426 views)
File Type: jpg StackUp2.JPG (400.1 KB, 391 views)
File Type: jpg StackUp3.JPG (402.0 KB, 392 views)
File Type: jpg StackUp4.JPG (409.5 KB, 383 views)
File Type: jpg StackUpKIT.JPG (374.4 KB, 201 views)
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Old 30th August 2012, 02:57 AM   #883
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Quote:
Originally Posted by iancanada View Post
The FIFO KIT wasnít designed this way originally. But to stack the clock board on top of the FIFO board will save a great deal of space, especially for a small DAC case. So, I was wondering is there any possible?

I realized both FIFO board and the clock board have same pitch of mounting holes on vertical side. So I ordered some 6Ē FPC/FFC cables. I did a try today, the answer now is YES! It looks just nice. Two standoffs assembled throughout the base feet. Another standoff could be a support for there is no mound hole underneath. The last mounting hole on the clock board has to be left open. Some components right over there.

I donít think a 6Ē FPC/FFC cable gonna be any problem for the clock signal. But I have to confirm, at least for high Fs applications such as 384 KHz.

Ian
Ian

I am doing the same thing too, I've ordered the longer FPC/FFC cable and PH2.0 jumper a couple days ago
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Old 30th August 2012, 03:28 AM   #884
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Quote:
Originally Posted by bigpandahk View Post
Ian

I am doing the same thing too, I've ordered the longer FPC/FFC cable and PH2.0 jumper a couple days ago
That's great. Compare with BIII, the FIFO KIT looks a bit bigger. And now, they match .

Regards,

Ian
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Old 30th August 2012, 05:55 AM   #885
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Quote:
Originally Posted by iancanada View Post
The prototype of Si570 based clock board is working now. Itís generating the frequencies I want. For DAC applications, now it could be 11.2896, 12.2880, 22.5792, 24.5760, 45.1584, 49.1520, 90.3168 and 98.3040 MHz.

At high frequency mode which designed especially for ESS9018, the output frequency will be fixed at 90.3168 and 98.3040 MHz. The *Fs range will be from 256*Fs to 2048*Fs corresponding to 44.1Khz to 384KHz.

At low frequency mode for classical DAC, the MCLK will be changed automatically from 11.2896 to 49.1520 MHZ corresponding to 44.1KHz to 192KHz with *Fs fixed at 256*Fs.

The next step, Iíll run this Si570 based FIFO KIT with ESS9018 BIII at sync mode on 90.3168 and 98.3040 MHz.

Ian
Ian

Remember to have more output for Dual Mono or multi-channel
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Old 30th August 2012, 06:10 AM   #886
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Hi Ian.

One comment.

EC-Designs made quite some steps up by attenuating the I2S output
voltage on his ultimate 1541 DACs/SD-card players.

Have you ever looked into this?

Cheers
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Old 30th August 2012, 08:10 AM   #887
asaf23 is offline asaf23  Russian Federation
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Originally Posted by iancanada View Post
Universal SMT XO adapter
"Two optional 100n 0603 and one 1u 0805 MLCC are recommended. But if the XO has good internal decoupling capacitors, then you donít need any of them."
PN: 445-1316-2-ND, 490-4785-1-ND

Ian
Does the CCHD-957 has good internal decoupling capacitors, I mean do I need to assemble the optional MLCC at the SMT XO adapter with this Crystek XO?

Andrey
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Old 30th August 2012, 12:25 PM   #888
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Originally Posted by asaf23 View Post
Does the CCHD-957 has good internal decoupling capacitors, I mean do I need to assemble the optional MLCC at the SMT XO adapter with this Crystek XO?

Andrey
Yes, it does. You don't need the MLCC for CCHD-957.

Regards,

Ian
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Old 30th August 2012, 12:27 PM   #889
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Originally Posted by bigpandahk View Post
Ian

Remember to have more output for Dual Mono or multi-channel
Thanks bigpandahk, will do it later on. I may have some solutions even for now .

Regards,

Ian
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Old 30th August 2012, 06:00 PM   #890
glt is offline glt  United States
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Quote:
Originally Posted by iancanada View Post
[COLOR=black][FONT=Verdana]...

I donít think a 6Ē FPC/FFC cable gonna be any problem for the clock signal. But I have to confirm, at least for high Fs applications such as 384 KHz.

Ian
You can flip the clock board and use 1" cables, but it will look UGLY :-)
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