Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 79 - diyAudio
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Old 23rd July 2012, 04:09 PM   #781
qusp is offline qusp  Australia
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DSD over PCM is just DSD converted to PCM in the player afaik, in which case the fifo should do just fine. it pretty much has to be converted, there is no other place for it to be converted before the dac. if it passes through as PCM then yes it will I would think, if it doesnt, then no it wont. pretty simple equation. fifo is built to reclock i2s, that is all…
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Old 23rd July 2012, 04:19 PM   #782
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Of course. I need to wait on my questions until I've woke and have enough coffee in me. The FIFO would be downstream of the eXD board, who's firmware would 'unpack' the DSD stream and pass it down to FIFO. Yea, not gonna work.
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Old 24th July 2012, 12:28 AM   #783
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Quote:
Originally Posted by hirez69 View Post
Hello Ian,

first, thank you for sharing your fabulous project and for the great job to organize the GB.


In the search for alternatives to Crystek's XO, I would like to know if NDK's oscillators, 90.3168 MHz & 98,304 Mhz, are "compatible" with Dual XO clock board.
Those XOs would prevent the double speed mode.
If your answer is affermative, please let us know the right settings.

I attach the datasheet.

Greetings

hirez69
Hi hirez69,

You may try 90.xxx and 98.xxx XO for Fs=88,96,174.2,192,384 Khz . Theoritially it could but not guaranteed because it almost reach the limitation of internal timing. But for sure those frequency will not support 44.1 and 48KHz,for the FIFO do not have a 2048*Fs mode.

Good luck

Ian
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Old 24th July 2012, 12:37 AM   #784
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Originally Posted by MisterRogers View Post
Morning! (at least for me :-) Yea, I know FIFO doesn't do DSD, I was more curious as to whether it might 'pass through' DSD. I'm also curious about about how the DSD over PCM 1.0 spec. will 'play' with FIFO. I'm using an eXD PCM/DSD board in one of my builds that's using this spec.
Hi MisterRogers,

Sorry for the late reply. The current version of FIFO support I2S( or left,right justified now) only. They will not accept DSD stream, nor let it pass through. Actually DSD is totally the different story than the I2S. It need more memory space even running at same Fs. It comes with different timing as well. The multi-channel FIFO may support both of them at same time. But at least I need 64Mb on board memory.

Have a good night.

Ian
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Old 24th July 2012, 01:55 AM   #785
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Thanks for taking the time Ian. I figured as much. Not a show stopper; the eXD board I'm using for USB->I2S has both I2S and DSD headers. I'll just need to build in a DSD mode selector and keeping the I2S/DSD streams separate (there's a firmware option to multiplex I2S/DSD I was considering). I'm very much looking forward to building my DAC using your FIFO kit. Thanks for all of your time and effort Ian!
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Old 25th July 2012, 07:49 AM   #786
hirez69 is offline hirez69  Europe
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Quote:
Originally Posted by iancanada View Post
Hi hirez69,

You may try 90.xxx and 98.xxx XO for Fs=88,96,174.2,192,384 Khz . Theoritially it could but not guaranteed because it almost reach the limitation of internal timing. But for sure those frequency will not support 44.1 and 48KHz,for the FIFO do not have a 2048*Fs mode.

Good luck

Ian
Ian

thanks for the answer. NDK 90.x and 98.x XOs are very expensive and before buying I want to be sure. I think that the limitation for 44.1 and 48Khz closes any possibility, unless I accept to do "XO-Rolling".
Any chance to add 2048xFs mode?

hirez69
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Old 25th July 2012, 12:23 PM   #787
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ok i've moved the convo over here away from the GB thread, sorry about that Ian, i'm trying to find a solution to the issue under discussion above, others just want to poo poo any suggestions, rather than working to solve the issue. how about using a very low phase noise clock plus something like Si5315?

then of course we have options to make a quad clock board, up the memory to allow 2048, or upsample in software like puremusic on the fly and just use the NDK. they will always be upping the speed of dacs though, whether we need it or not …

the DSPLL type, whether SiLABs or vectron or some other manufacturer, would allow us to simply keep pace as far as the dacs can match. the ESS for example will run much faster again with OSF disabled, but I dont think it will allow a doubling of speed of MCLK again from the 90.x/98.x without overheating and burning. dunno maybe some sort of phase change heatsinking solution on the dac would allow it hehe

Last edited by qusp; 25th July 2012 at 12:26 PM.
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Old 25th July 2012, 12:28 PM   #788
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Quote:
Originally Posted by roender View Post
Would you please specify where is used? In which project here at diyaudio or elsewhere?



My point is clear: si570/571 proposed by you isn't suitable for audio. It is just a generic XO with a variable output frequencies.
Ian has trialled this clock himself subjectively and commented on it on diyaudio.


Quote:
Originally Posted by roender View Post

This doesn't means that this project isn't valuable. It's beautifully conceived but not complete (IMHO)
I am interested to hear what features you find lacking / missing from this project?
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Old 25th July 2012, 02:13 PM   #789
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his experience of the part quite clearly extends no further than the reading of datasheets. or rather one specific number which he has heard is important. it is, but its far from the end of the story when it comes to practical application. still waiting on an alternative that I didnt mention already before he started arguing; but maybe we just let him go design something better? i'll keep an eye out …

the project is about as good as it gets and the collection of experienced members, hobbyists and professionals alike that are gathering around or have already bought it is a pretty good indication.

the points under discussion are a matter of ease of use under fairly extreme variation, from the slowest to the highest speeds available. upsampling x 2 in software is not going to do any damage, so its a viable solution.

at least one other project, the widget used the Si parts as one option, though I think they used one of the lower spec parts.

Last edited by qusp; 25th July 2012 at 02:28 PM.
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Old 25th July 2012, 02:38 PM   #790
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Ian, could the board or firmware be rejigged to allow the dual clock board to contain say a 45.1584 plus 98.304 XO's? then the only speeds not covered would be 48kHz and 354.x kHz which in my world are pretty rare
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