Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 66 - diyAudio
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Old 13th June 2012, 03:39 AM   #651
PET-240 is offline PET-240  Australia
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Perhaps a second FIFO or use the isolated outputs from the wave into the same inputs to the FIFO, but don't power the NV715 chip. I have no idea how this would affect impedance but it probably wouldn't be good. Just a thought!
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Old 13th June 2012, 07:08 AM   #652
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Use wave spdif output and switch spdif?
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Old 13th June 2012, 07:14 AM   #653
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I prefer I2S which sounds better.
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Old 13th June 2012, 07:38 AM   #654
qusp is offline qusp  Australia
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Quote:
Originally Posted by bigpandahk View Post
I prefer I2S which sounds better.
not really with the fifo it doesnt, not enough to worry about IMO. there are other advantages in that higher rates and multichannel can be achieved, but I think Ian has leveled the playing field considerably with this board
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Old 13th June 2012, 08:01 AM   #655
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Quote:
Originally Posted by qusp View Post
not really with the fifo it doesnt, not enough to worry about IMO. there are other advantages in that higher rates and multichannel can be achieved, but I think Ian has leveled the playing field considerably with this board
This was what I was trying to lead bigpandahk to, but was brief when typing on my phone.

Compromised i2s switching IMO is a worse solution than switching an spdif signal and feeding either spdif into FIFO. Certainly better to be spending the money on good quality clocks for the FIFO than on extra gear to allow switching of the i2s.

I am leaving spdif sources out of my system because i2s switching isn't for me and my only source is a computer.
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Old 13th June 2012, 08:48 AM   #656
qusp is offline qusp  Australia
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for me, spdif is just for legacy support, USB is the only important input, if spdif was causing problems with routing I would be more likely to use a single ttl level spdif input board and plug it directly into the buff, leaving only USB going through the fifo
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Old 13th June 2012, 11:52 AM   #657
regal is offline regal  United States
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Quote:
Originally Posted by qusp View Post
for me, spdif is just for legacy support, USB is the only important input, if spdif was causing problems with routing I would be more likely to use a single ttl level spdif input board and plug it directly into the buff, leaving only USB going through the fifo
I was thinking the opposite : usb-spdif-i2s-fifo-i2s is good for the galvanic isolation the spdif pulse transformer provides from the computer, at least better than an adum.
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Old 13th June 2012, 12:48 PM   #658
qusp is offline qusp  Australia
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didnt say to get rid of the transformer, just have a separate reasonably well done spdif input + TTL level shifting and connect directly to the dac. for me that makes more sense than changing the whole signal path to accommodate an input I hardly ever use. plus spdif is band limited at lower speed than my i2s
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Old 13th June 2012, 11:06 PM   #659
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plus spdif is band limited at lower speed than my i2s
This is my main concern, I use both Toslink and USB for input. The BIII can't switch between 2 I2S source.So the only option is USE-SPDIF-FIFO-I2S?
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Old 15th June 2012, 04:33 PM   #660
tjencks is offline tjencks  United States
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Default Clock Recommendations for Dual Mono Buff III

Currently planning a Buff III build using I2S FIFO and wanted some recommendations. I have read through the thread and have come away with the following assumptions:

1. The clock that most people are going with and liking seems to be the CCHD-957 in 45.1584 and 49.152. Is this correct or has a better option been discovered. Though I know largely this is a matter of opinion.

2. I'm not sure if I've seen a Dual Mono Buff III build using the FIFO yet. Has anyone built one yet and can advise on how to provide both Buff III with the same Clock and I2S output from a single FIFO ?

3. Reading the Buff III docs and thread it was mentioned that having the clock extremely close to the Buff III itself has really large benefits. Do folks feel that the FIFO with the Dual Clock Board out weigh the benefits of having the default clock on the Buff III so close physically thus having the absolute shortest path to the Buff III chip itself.

-TJ
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