Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

I am joining both of you guys with this opinion. It makes all sense with internal I2S source ( USB to I2S board), but for any transportation longer than few inches benefits are lost. I2S has a clear advantage when conversions to and from S/PDIF are voided and that is where popularity stems from. But, short distance requirement, coupled with need for very particular high quality wiring and coupling, opens up I2S as a wrong choice in many situations. As for the choice of S/PDIF signal and its integrity I would always prefer balanced approach, which kind off makes it AES/EBU.
Isn't the choice of interface inconsequential when using the FIFO?
 
Tunning internal jitter of Buffalo DACIII

Sorry for off topic. But I did perfect tunning of Buffalo DACIII its tunning very, very, improves sound! This is related to a decrease electrical noise for ESS9018.I assembly on all in and out Trident Buffalo DACIII 18dB/oct Murata 100MHz filter.This reduces internal jitter ESS9018. Enjoy :)
 

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...I do like the idea of an isolated datastream to the clock board, to enable cutting the ground connection no matter what your source is. weve mentioned it before
I also like the idea of a separated clock board from fifo but missed where this was mentioned before.

For the I2S signals (MCK, SCK, WS, SD) a small board between fifo and clock board could comprise for e.g. some ISO150 / ISO7220 digital couplers.

Beside MCK and power what other signals are carried on the flexible molex cable? to know how many isolators are needed
What do you think?

L.E.: ISO150 might be an older part as ISO722 or alike are much cheaper
 
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at marce: you said it....particularly when there is murata LC network (SMD) that would have just soldered directly across the inputs… thats if it was something really worth doing. the above is quite a contrast to the 'MODs' of the thread subject. those filters look more like noise aerials (lightning rods) connected directly to the clock power supply and ground to me.....

@ vzs: i've mentioned it a few times, last time only a few pages ago, maybe once in the GB thread too. I was thinking more an island on the PCB rather than adding another connection, but an adapter would work sure. what cable are you talking about? all we realy need to do is float ground somehow between the boards. thats easy enough for the power, just power the clock with a separate battery or transformer winding+floating reg, but the signals are another thing, there will be control signals etc, I think the only way to do this successfully would be with Ian onboard
 
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Sorry for off topic. But I did perfect tunning of Buffalo DACIII its tunning very, very, improves sound! This is related to a decrease electrical noise for ESS9018.I assembly on all in and out Trident Buffalo DACIII 18dB/oct Murata 100MHz filter.This reduces internal jitter ESS9018. Enjoy :)

I thought the board already has ferrites on all the supply lines. This has been standard feature in all the TPA boards since way back...
 
I also like the idea of a separated clock board from fifo but missed where this was mentioned before.

For the I2S signals (MCK, SCK, WS, SD) a small board between fifo and clock board could comprise for e.g. some ISO150 / ISO7220 digital couplers.

Beside MCK and power what other signals are carried on the flexible molex cable? to know how many isolators are needed
What do you think?

L.E.: ISO150 might be an older part as ISO722 or alike are much cheaper

I think the NVE IL715 is a good part. It is used in other implementations to isolate I2S. I did an experiment here: Experiments with NVE IL715 Isolator H i F i D U I N O
 
... I was thinking more an island on the PCB rather than adding another connection, but an adapter would work sure. what cable are you talking about? all we realy need to do is float ground somehow between the boards. thats easy enough for the power, just power the clock with a separate battery or transformer winding+floating reg, but the signals are another thing, there will be control signals etc, I think the only way to do this successfully would be with Ian onboard
Agree that would be a nice adding for a future rev. clock board.
I'm talking about the FFC cable, right to the 7pin PH2 cable. Afaik this carries the MCK from clock board to fifo and the power from fifo to clock, and probably other signals as well... Ian could tell.

This small adapter could fit/float between the FIFO and Clock-board and would have all connectors needed 2x 7pin PH2, 2x FFC conn and 2x PH2 con for power (right-angled smd version to be neat). I'm working on my multibit DAC board now and with one dirty hand I will do this as well - just to decide which digital coupler to use.
 
Agree that would be a nice adding for a future rev. clock board.
I'm talking about the FFC cable, right to the 7pin PH2 cable. Afaik this carries the MCK from clock board to fifo and the power from fifo to clock, and probably other signals as well... Ian could tell.

This small adapter could fit/float between the FIFO and Clock-board and would have all connectors needed 2x 7pin PH2, 2x FFC conn and 2x PH2 con for power (right-angled smd version to be neat). I'm working on my multibit DAC board now and with one dirty hand I will do this as well - just to decide which digital coupler to use.

For MCLK, there is not any problem. The only thing I'm concerned about would be the 12-18ns propagation delay. As well as the 3ns channel skew. The I2S re-clock can't be done within one mclk phase. The total delay will be around 3 clk time for 98.xxx MHz. Risk of low Tsu and unstable. But if we don't care much about the jitter on I2S....

Ian
 
maybe its better to just isolate the i2s input? though I do like the idea of isolating everything up to the last reclock

It might be OK for high MCLK around 100MHz, if there is anything wrong caused by low Tsu, it should be corrceted by the last flip-flop at next raising edge. But I have to confirm this at a real circuit board to see if could pass the loop test.

Ian
 
I use TX & RX ballanced line for I2S
(asaf23 made a diagram...)
no need for sheilded cable just twisted pairs
and signal is much better from the point of integrity
also using isolated I2S bus and MCK, with AD units
but with galvanicaly separated power supply. Every isolated module have to have own
power from transformer point...
.
Some devices are do not accept USB galvanic isolation
but My exeriaence is that USB power should be used just like the info is the device are plugged in.
.
The Q of the transformers remains, I am using C.T. types full rect. So every ground is "real", but I didnt try with more common PS design?
.
The story of the jitter is not crucial thing, because it is about mesuremens with very expensive equipment and operating with proper knowledge how to use the eqip.
so for me it is in apsence of meas - just try it one to one...
There are more vital things in design prior to famous jitter issues, at least for me.
.
cheers
 
Agree that would be a nice adding for a future rev. clock board.
I'm talking about the FFC cable, right to the 7pin PH2 cable. Afaik this carries the MCK from clock board to fifo and the power from fifo to clock, and probably other signals as well... Ian could tell.

This small adapter could fit/float between the FIFO and Clock-board and would have all connectors needed 2x 7pin PH2, 2x FFC conn and 2x PH2 con for power (right-angled smd version to be neat). I'm working on my multibit DAC board now and with one dirty hand I will do this as well - just to decide which digital coupler to use.

It's achievable. Will take into consideration.

Ian
 
Did you try Si8440? Different from GMR , similar to TI, it use high voltage CMOS capacitive gap technology, and runs at 150MHz. It might share same footprint with IL715.

Ian

I did not try the Si8440 primarily because per spec it had more added jitter than the NVE part. In addition, most implementations uses the NVE isolator.
 
Digital isolator board for FIFO KIT

A small digital isolator board, providing 100% isolation between FIFO board and clock board. Making the clock board works as a local part of DAC with all EMI noise isolated from digital front end.

The Fmax could go up to 110MHz with IL260E or 150MHz with Si8650.

It can stack on top of the FIFO board, or to be the base of the clock board.

Have a nice weekend

Ian
 

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