Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 255 - diyAudio
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Old 6th March 2013, 08:04 PM   #2541
TNT is offline TNT  Sweden
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Quote:
Originally Posted by makumba1966 View Post
Last I combined the default set of MLCC's, that is on Si board, with an alternative set of Ian's MLCC's. Despite the fact, that I did not like none of the sets used separately, used together gave very good result to me. Sound is natural with good timbre and quiet black background without any annoying artifacts. Ian can you tell what specific types of capacitors are using?
Do you mean 3 of each?

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Old 6th March 2013, 08:21 PM   #2542
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Do you mean 3 of each?

/
No, I am using 12 capacitors soldered directly one above the other. I have not tried mixing smaller amount so far, waiting for sound stabilization as advised Greg in #2536.
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Old 6th March 2013, 08:27 PM   #2543
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OK, I had actually to give up feeding the FiFO/clock with the TP as delivered after 3 days. Sounded way to *harsh*. Really awful actually. Strange. Why?
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Old 6th March 2013, 09:03 PM   #2544
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OK, I had actually to give up feeding the FiFO/clock with the TP as delivered after 3 days. Sounded way to *harsh*. Really awful actually. Strange. Why?
I'm thinking that because of the fresh MLCCS on the board as mentioned Greg.
X7R dielectric caps have poor capacitance stability and they are piezoelectric.
I am waiting for 1u PPS caps for replacing.
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Old 6th March 2013, 09:13 PM   #2545
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OK! Trying stacked -> 12 caps now... absolutely first impression is that it indeed seem better...
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Old 6th March 2013, 10:05 PM   #2546
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TNT you're using the TPS7A as a pre-regulator for the entire FIFO+clock board setup correct? IE Not as a local LDO reg on the Si570, in the way makumba1966 is using it?

There is a bunch of other local regulators in these devices that you're supplying, for the pre-regulator to make a significant detrimental impact on the sound, I suspect there is something other than caps that are causing your problems.

Could you describe or show the connections you've got to the regulator board? What are you feeding it from?

The first thing that comes to mind is that you may be having thermal issues with the regulator chip with v-drop across the regulator or too much current or combination of these given that this tiny pcb is the only heat sink the regulator has ...
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Old 6th March 2013, 10:19 PM   #2547
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I run not only that but also the spdif board. The clock board is a single osc 11,28. With the added other 6 caps on it sounds good now :-D


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Old 6th March 2013, 10:29 PM   #2548
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I run not only that but also the spdif board. The clock board is a single osc 11,28. With the added other 6 caps on it sounds good now :-D


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Ok, so the total current draw of those boards is probably similar to the Si570 board that Ian designed this regulator for.

What is your input voltage?
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Old 6th March 2013, 10:31 PM   #2549
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hochopeper, I feed 6V with 7 volt in...

Last edited by TNT; 6th March 2013 at 10:50 PM. Reason: corrected figures.
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Old 7th March 2013, 01:24 AM   #2550
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more likely its just the power of suggestion...

stacking the caps creates a longer ground path with each one stacked, worse than having them on the PCB, for it to create an improvement is somewhat confusing to say the least.

Last edited by qusp; 7th March 2013 at 01:28 AM.
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