Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 249 - diyAudio
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Old 24th February 2013, 01:15 PM   #2481
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Quote:
Originally Posted by dvb-projekt View Post
Hi Ian, hi Chris,

please add the needed current from each single module to the wiki page.

It would be a great help for those, who would like to use external shunt regulators e.g. Salas SSLV.

With the data we could set the correct shunt current value.

Thanks in advance,
Oliver
Excellent suggestion, there is a challenge in that there is a few different configurations wrt isolation and also your oscillator selection will change things for the dualXO board.



Here is one quote I dug up (from March 2012)

Quote:
Originally Posted by iancanada View Post
Hi coolhead,
The total power consumtion is up to what oscillators you are using. For the default configuration, the total current is around 110mA for all the 3 boards.
Have a nice weekend.

This post of Ian's addresses all 3 boards together, which is not really the recommended configuration now. This was a pre-isolator conversation I believe. Ian also points out that the clock board is going to vary based on the current requirement of your oscillators. The 110mA does line up reasonably with the numbers posted above by nvduybom so that gives confidence of what to expect at least .

For the salas LV shunts you need something like 100mA minimum anyway don't you? (which I assume you're talking about, because you have PCBs for them already)

Ideally, for the PSU, you would separate the PSU+transformer for the transport+FIFO from the PSU+transformer for the DualXO+DAC+IV+etc and use Ian's isolator board in between. So you're looking at [1] transport+FIFO demand and [2] clock board demand.


[1] will vary if you use a transport other than Ian's spdif board; [2] will vary with oscillator selection.


Chris
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Old 24th February 2013, 02:08 PM   #2482
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Quote:
Originally Posted by hochopeper View Post
I think we've misunderstood vd-two's question guys, I didn't get it until just now, re-reading the FIFO manual.

J13 is the output port to monitor *FS currently used, is this the same in 'normal' and 'double speed' modes? He isn't asking about setting the double speed mode, but how to use the J13 port to monitor while the FIFO is set for double speed, the current version of manual has missed this configuration by the looks.

The Page 6 of the FIFO manual shows this lookup table for J13 pin 2 and 3:


Is it fair to guess that 0, 0 might indicate 1024*Fs? This would be consistent with the LED status notifications so would make sense, I think.


Cheers,
Chris
Thanks Chris,

Your address this issue correctly.

But, when I double check the verilog source code, I found there was a changing caused by upgrading the optional default 512Fs jumper. But I forgot update the user's guide. The signal new is become:

// fs128 fs512 fs
// 0 0 256fs
// 1 0 128fs
// 0 1 512fs
// 1 1 1024fs

Sorry for the confusion.

If it is possible, could you please put a note on the wiki?

Thanks again

Regards,

Ian
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Old 24th February 2013, 02:08 PM   #2483
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Quote:
Originally Posted by hochopeper View Post
Excellent suggestion, there is a challenge in that there is a few different configurations wrt isolation and also your oscillator selection will change things for the dualXO board.
Hi Chris,

thatīs the point. I will use Ianīs S/PDIF board with a backdoor connected Wave IO, the Dual XO with the isolator board in between and i hope soon, the PCM board.

I am planning to use two SSLV shuntīs. One separate for the Dual XO and the 2nd for the other parts.

Quote:
Originally Posted by crobbins5421 View Post
Hi Oliver,

I made two modifications to your (Salas) 5V shunt board. One was to lower the current limiting resistor to 3.9R (Kiwame) and the other was to add a 1N400X diode between the two LED's. The end result gives me ~6V and 500mA. This was the recommended power supply values Ian listed in the FIFO manual.

And...it sounds wonderful.
Perhaps you could lower the shunt current a bit, if we have the single current values.

Cheers,
Oliver
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Old 24th February 2013, 02:17 PM   #2484
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I've been contemplating that....will probably put the 10R back in eventually...
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Old 24th February 2013, 02:29 PM   #2485
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Originally Posted by iancanada View Post

If it is possible, could you please put a note on the wiki?

Done

I guessed that this came with v3.80 firmware changes? Is that correct?


Chris
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Old 24th February 2013, 03:08 PM   #2486
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Quote:
Originally Posted by hochopeper View Post
Done

I guessed that this came with v3.80 firmware changes? Is that correct?


Chris
Yes, it's from the last upgrading version.

But, a special case is working with Si570 clock board, the result needs to *2 , because of the native high frequency mode. For example, if you use Si570 clock board and you get Fs1024, the actual should be Fs2048.

I'm sorry if there is another confusion.

Regards,

Ian
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Old 24th February 2013, 03:44 PM   #2487
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Thank you for your help, this is what I wanted to clarify
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Old 25th February 2013, 08:42 AM   #2488
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Hello,
newbye on this thread. I will have a Buffalo IIISE with Paul hynes regulator and a tube Lampizator output stage.
I'm looking also for a USB/I2S converter (Luckit Xmos or Amanero : advice what is the best one, or others ???).
Would it be a nice improvment in SQ to add between the USB/I2S and the Buffallo to add the the Ian FIFO +dual XO reclocker ??
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Old 25th February 2013, 10:38 AM   #2489
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Quote:
Originally Posted by dvb-projekt View Post
Hi Chris,

thatīs the point. I will use Ianīs S/PDIF board with a backdoor connected Wave IO, the Dual XO with the isolator board in between and i hope soon, the PCM board.

I am planning to use two SSLV shuntīs. One separate for the Dual XO and the 2nd for the other parts.


Cheers,
Oliver
Sounds like your plan is on the right track

Don't forget to add say 4mA/isolated signal through each isolator. The default v2.5 isol circuit has 9 isolated signals.

Add more if you are planning to add the general purpose isolator also.

nvduybom,

Is there any chance you could give some comments on the conditions that these measurements were taken? Was this during playback? What clocks were installed?

Quote:
Originally Posted by nvduybom View Post
I measured the current for each moudle :
FIFO: 15mA
SPDIF:40mA
DualClock: 45-50mA

Cheer,

Van Duy
Ian, while these measurements above are in the ballpark of your expected total, do they look about right to you? If I used these for wiki values would that seem ok?


Cheers,
Chris
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Old 25th February 2013, 08:34 PM   #2490
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Quote:
Originally Posted by hochopeper View Post
Sounds like your plan is on the right track

Don't forget to add say 4mA/isolated signal through each isolator. The default v2.5 isol circuit has 9 isolated signals.

Add more if you are planning to add the general purpose isolator also.

nvduybom,

Is there any chance you could give some comments on the conditions that these measurements were taken? Was this during playback? What clocks were installed?



Ian, while these measurements above are in the ballpark of your expected total, do they look about right to you? If I used these for wiki values would that seem ok?


Cheers,
Chris
FIFO at least 80mA, I need double check.

Ian
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