Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 24 - diyAudio
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Old 28th January 2012, 02:27 AM   #231
qusp is offline qusp  Australia
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demian, its not true that we dont care about ~112MHz jitter, in fact i chose the number from that range specifically, there are a number of other phase noise measurements as well. to run with sabre which has an internal 1.4MHz clock for the DSP/OSF, the clocks used in 9018 are generally in the range of 80-120MHz

what interests me about it apart from the chameleon qualities, is its high PSRR due to its output stage/buffer and already has onboard regulators. i'd like to see some 50-100Hz phase noise too, but that can wait till we try it out

Last edited by qusp; 28th January 2012 at 02:33 AM.
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Old 28th January 2012, 02:40 AM   #232
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Quote:
Originally Posted by zinsula View Post
Why do you think I'm arguing with you?

I only say that an LDO is by far worse at LF than eg Demian's circuit and that this is detrimental for clock performance.

And I thought that you may be interested in reading the article. No need to feel attacked.

Please go forward with whatever you find important.
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sorry man, that was partially me being snippy due to having to pack up my entire workshop in the middle of a time where i'm already a bit behind with orders. however ive lost count the number of times someone has quoted that ancient article to me to show the noise of batteries.

I just dont find it particularly productive talking about the have-nots of the board when the haves have not even been explored yet and you are free to use whatever reg you like.

i'll crack mine open in a few days, after the worst of the rain is over
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Old 28th January 2012, 03:10 AM   #233
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Quote:
Originally Posted by qusp View Post
demian, its not true that we dont care about ~112MHz jitter, in fact i chose the number from that range specifically, there are a number of other phase noise measurements as well. to run with sabre which has an internal 1.4MHz clock for the DSP/OSF, the clocks used in 9018 are generally in the range of 80-120MHz

what interests me about it apart from the chameleon qualities, is its high PSRR due to its output stage/buffer and already has onboard regulators. i'd like to see some 50-100Hz phase noise too, but that can wait till we try it out
I know many customers could not care less about 112mhz jitter with this design? The fifo sort of makes the Sabre 80-120mhz asych (or synch) reclocking a bit redundant? Wouldn't you want to turn off the PLL if you were resorting to using a Sabre with this device? I guess since the filter is integral to the Sabre you still want the reclock to do some cleanup afterwards? But trying to bend this design around a unquie switcher chip may not be the best solution for all. The improvement with this fifo inserted in front of a tda1541 for the typical guy with a cs8412-tda1541a NOS dac is going to be huge, without investing a fortune in the clock. Hopefully the clock choice is flexible so all parties can be happy.


One question I have is what are the frame lengths of the fifo output, is it possiblt to have true 16 and or 24 bit data, or is this sending 32 bits lengths per channel ?
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Old 28th January 2012, 05:02 AM   #234
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huh?? wut? bend the design? resort to use with sabre? huh? this is talk of the clock module. i'll be using this fifo for the spdif inputs on my sabre. the clock board is completely separate remember, no bending needed apart from harnessing the logic voltage to switch speeds. No bending by Ian is going to happen anyway, the design phase is finished, thats why i've been having a bit of a short fuse with people suggesting changes, when from this point on, the changes are up to you.

i'll be looking at this DSPLL clock unit for use as the master clock on my dac, which is very much multichannel USB focused for my digital crossover and at higher speeds than the fifo can cope with. i will still be using the OS filter, but running sync mode and to get the higher speeds you need to be running something like 96MHz and 88MHz. i may try to work it in so all the inputs have a single master eventually, but thats a bit of work. after initial testing the fifo will probably end up just on Spdif, or and this is possibly a bit more likely, on a dedicated 2 channel headphone rig

Last edited by qusp; 28th January 2012 at 05:06 AM.
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Old 28th January 2012, 05:25 AM   #235
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Sorry Qusp, I misunderstood as scope creep. I am with you as far as letting Ian's design be and hopefully we can get our hands on them soon, it going to be a great building block whatever we decide to use with it.
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Old 28th January 2012, 06:29 AM   #236
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no drama Regal, yeah i'm keen to get playing with it, i think its a great concept for traditional 2 channel, it should be pretty much ideal, so it seems a shame to just use it for spdif on a dac where that probably wont get used that often. i'm thinking more and more it will go into a dedicated headphone and small powered monitor rig for the workshop
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Old 28th January 2012, 06:34 AM   #237
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I was looking at this specific system which is why I indicated that 100 MHz oscillator phase noise would not be indicative of the expected performance. It would be quite possible to use an ESS chip synchronously with this system but you would need to have two oscillators or switch frequency and the possible target frequencies are like 122.88 MHz and 112.896 MHz. I believe there is an upper frequency limit for the ESS in sync mode. You would also need to divide down for the logic in the system to work properly.

Actually it seems their XO modules work in three ranges and the lowest has the highest jitter numbers. The more conventional oscillators actually get better down to 4 MHz and then start to get worse. Given the size of the module the crystal blank must be pretty small so this is very good performance given the size of the crystal.

If I can get my low noise measurement front end working right I will measure some sources, like batteries, to see what I can learn. I need to get the hum sensitivity out of it first.
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Old 28th January 2012, 06:50 AM   #238
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last off topic post on this. my plan would be to use one clock for the 24x and 22.1x integers and a dedicated 10 or 12MHz clock for logic. there is already code and logic level outs to trigger the change between what is currently 2 discrete TCXOs. it may not end up the be all end all, but definitely worth some investigation. all of the switching and division hardware is already in place, but I would be looking at spinning a dedicated board and maybe liaise with Acko for a firmware update for trying this out.

anyway best get back to the topic at hand, sorry i should have been more specific that i was talking about it being useful for my and others systems more broadly. obviously Ian also sees some potential or he wouldnt have mentioned it in the first place.

i'll be interested in some updated battery noise and impedance vs frequency plots; the datasheets for the A123 are pretty decent and cover all the internal impedance vs temp etc, but i gather they didnt expect them to be used so much in audio so noise is not covered

Last edited by qusp; 28th January 2012 at 06:53 AM.
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Old 29th January 2012, 11:55 PM   #239
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Default My little toy, A LiFeP04 battery based reference XO power supply

I did a little toy. I connected an A123 LiFeP04 battery to a 14pin IC socket. This configuration works as an adapter bypassing the power of the PCB. So the battery could power the XO oscillator directly from the socket as a reference without changing any other function. The output voltage of LiFeP04 is just around 3.3V. This little toy is really working.

Iím looking for power supply which comes with equal or closing low noise performance than a batter. But Iím not lucky so far. Itís really hard to measure if the PUS output noise is low, especially within wide bandwidth. However, by compare with the battery reference, itís very easy to tell which one is better. I did some research by making use of this reference, the result was very interesting.

Itís also available that replacing the battery with other PSU to be evaluated.
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Old 30th January 2012, 03:13 AM   #240
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This clock has by good spec.

AccuSilicon: <0.5ppm Ultra Low Phase Noise Crystal Oscillator and TCXO IC
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