Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 232 - diyAudio
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Old 30th January 2013, 10:22 PM   #2311
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Quote:
Originally Posted by qusp View Post
I know that the buffer already adds more, or at best about the same jitter as the NDK and crysteks sans buffer, if you have to multiply the fundemental, then...
of course, the FIFO buffer has higher jitter than the XO, but as I said several time in my previous posts one can feed directly the DAC BCK from the MCLK and then send it back to the source (the FIFO buffer). A synchronous system with a clean bit clock close to the DAC chip, certainly within the reach of the diyer (since we are in a diy forum).
No multiplier, an overtone crystal reachs easily 100Mhz at third or fifth overtone.
No PLL, not much loved from audio devices.
An easy way? I can reply for myself, not for all the folks of this thread, IMHO a way to get better performance.
The FIFO buffer is a good project (take a look at the group buy, I got 5 units), but with some additional trick it can become a great project. I believe that in this thread there are those who wants play any kind of liquid music at all costs, but there are also those who wants to reach the better performance although with less friendly solutions.
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Old 30th January 2013, 10:49 PM   #2312
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Quote:
Originally Posted by andrea_mori View Post
of course, the FIFO buffer has higher jitter than the XO, but as I said several time in my previous posts one can feed directly the DAC BCK from the MCLK and then send it back to the source (the FIFO buffer). A synchronous system with a clean bit clock close to the DAC chip, certainly within the reach of the diyer (since we are in a diy forum).
No multiplier, an overtone crystal reachs easily 100Mhz at third or fifth overtone.
No PLL, not much loved from audio devices.
An easy way? I can reply for myself, not for all the folks of this thread, IMHO a way to get better performance.
The FIFO buffer is a good project (take a look at the group buy, I got 5 units), but with some additional trick it can become a great project. I believe that in this thread there are those who wants play any kind of liquid music at all costs, but there are also those who wants to reach the better performance although with less friendly solutions.
My FIFO already did exactly this way. Clean MCLK from clock board is sent directly into the DAC chip. FIFO buffer logic is just synchronizing with MCLK which was sent back from clock board(could be via a isolator). Every signal is generated by the clock board at finial stage, so what clock you have what jitter performance you get. It has nothing to do with the logic. FIFO doesn't introduce any additive jitter to the clock board.

Just didn't get your point, what you are looking for?

I measured/tested most of the XOs you mentioned, including the discrete one, but forgive me, I just don't want telling much.

Regards,

Ian
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Last edited by iancanada; 30th January 2013 at 10:56 PM.
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Old 31st January 2013, 12:04 AM   #2313
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Ian,

From your testing result:
Period jitter RMS:5.988 ps
Period jitter peak-to-peak:+-21ps
Jitter distribution: Gaussian
frequency: 2.82239MHz

where this jitter come from? if it comes from the generic XO you are right, but if the XO has lower jitter then it comes from the FIFO. since it re-clock all the I2S signal.
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Old 31st January 2013, 04:11 AM   #2314
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yes thats the generic XO, since a meaningful measurement at 1-2ps at the output of the clock buffer (not memory buffer) is not so easy, so he crippled the design to get a number that meant something...

it seems you dont know how this module works...still.

the only jitter in this system is that of the master clock itself and the output buffer, similar to the logic buffer chips you recommended, but with a properly laid out impedance controlled PCB and tested to a level that means something, rather than anecdotal listening test results.

and here we are...De ja vu all over again.

this is still about the clock recommendation?

Last edited by qusp; 31st January 2013 at 04:18 AM.
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Old 31st January 2013, 06:36 AM   #2315
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Sorry for interrupting the thread.

I want to use external power for each FiFO block kit, so with DualXO Clock I will remove L11 and with SPDIF I will remove j10 cable . It is right ? .

Thanks you .
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Old 31st January 2013, 01:04 PM   #2316
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Without the generic XO jitter spec is not clear what is the source of the 6ps jitter.
The measurement should be repeated with the Crystek XO, from its phase noise specs it should have theorically about 0.3 ps (or 0.15ps at 11.2896 MHz).
If the SCK jitter will be the same 6ps, the Crystek or any other high performance oscillator will be unuseful, since the source of the jitter is the FIFO system (maybe the output buffer, I have never seen any schematic, so I cannot say anything).
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Old 31st January 2013, 01:21 PM   #2317
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Well...do you own a Fifo ? The quality of the clock make a significant difference. The crystek outperforms the tent by a fair margin. And i can imagine if this is a trend, why Ian get excited about the S571.
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Old 31st January 2013, 01:30 PM   #2318
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Quote:
Originally Posted by andrea_mori View Post
Without the generic XO jitter spec is not clear what is the source of the 6ps jitter.
The measurement should be repeated with the Crystek XO, from its phase noise specs it should have theorically about 0.3 ps (or 0.15ps at 11.2896 MHz).
If the SCK jitter will be the same 6ps, the Crystek or any other high performance oscillator will be unuseful, since the source of the jitter is the FIFO system (maybe the output buffer, I have never seen any schematic, so I cannot say anything).
aaargh seriously how hard is it to get through to you? the fifo system has NO effect on any of the outputs, not a single one, not MCK, not LRCK, not BCK, not SDATA, none of them.......none of them....

the fifo system has NO effect on any of the outputs, not a single one, not MCK, not LRCK, not BCK, not SDATA, none of them.......none of them....

how about you repeat the test and get a meaningful result, Ians measurement noise floor is about 2ps (which is pretty awesome really) and he could not get a meaningful result, so he crippled the unit by using the generic XO to get a result that meant something.

its really hard to tell if you read the pages the results were posted on, or anything but your own words posted in this thread. its baffling, you seem to be replying to our posts, yet its unclear if you understand them or read them properly.

that or you are trolling, you present yourself as a smart guy and there is at least some evidence of that, yet certain things need repeating and repeating and repeating; you keep on playing the same frustrating record

Last edited by qusp; 31st January 2013 at 01:34 PM.
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Old 31st January 2013, 03:05 PM   #2319
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Maybe I lost some posts of this 232 pages thread, I don't remember I read the measurement with the Crystek XO is under the noise floor of the spectrum analyzer. I apologize for this oversight.

Is there any post with the generic XO jitter measurement?
If yes, its jitter is around 6ps or lower?
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Old 31st January 2013, 03:40 PM   #2320
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My bet is that the output jitter is dominated by the clocking flip-flops... It would be interesting to do the test with the Crystek. Likely Ian already did that :-)
I have yet to see any datasheet having jitter values for flip flops which sort of indicates that jitter is not an important parameter for flip flops...
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