Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

[Adrculda]

AD9525 total overkill ???

[hochopeper]

Originally Posted by iancanada

I have a WaveIO USB. But I’m not happy with the 2.5ns jitter problem on I2S output caused by XMOS, though it’s no longer an issue working with my FIFO.

That 2.5ns problem has got to make you wonder why TPA are spending a few years developing their own XMOS based design usb adapter

[TNT]

Originally Posted by Adrculda

AD9525 total overkill ???

Some numbers are impressive but -89dbc/hz at 100hz is not the best we have seen.

[Adrculda]

Originally Posted by TNT

Some numbers are impressive but -89dbc/hz at 100hz is not the best we have seen.

Yes I agree, but a lot better to hear the noise in the higher audio band where its will be more pronounced. I would rather have it where its nearly inaudible rather than in the 8K - 20K range....

[TNT]

Adrian, noise in the clock manifest itself as distortion and not "noise" as in schhhsssss.

[Fridrik]

Hi! Anybody did a listening test with the fifo between the SI530 and CCHD-957 oscillator modules ?? availability of 22.579mhz part is problematic...

[bigpandahk]

Ian

When I connected an optical source to the SPDIF, it has lock LED on but no sound at the BIII, both Mute and Lock LEDs on BIII on, the system works perfectly with WaveIO connected to the I2S backdoor. Please HELP.

[sp502]

Originally Posted by hochopeper

That 2.5ns problem has got to make you wonder why TPA are spending a few years developing their own XMOS based design usb adapter

I am curious to know why you and others are referring to the 2.5ns jitter of the XMOS chip (could be any other chip as well) as a "problem".
Do you believe that the proper and/or unique point for perfect timing accuracy should be at the chip that "translates" USB data to I2S signals?
Why to try to be perfect in timings close to the source? Should we go back to the synchronous USB transports as well?
If you use a very simple I2S re-clocking circuit, similar to the ones found here, don't you get excellent results?
(Of course there are some limits of the amount of jitter that can be compensated, but I believe 2.5ns is orders of magnitude lower).

I think that many times there are exaggerated comments about the performance of some components without the proper justification.
Many functions may be performed in various points of a telecommunication chain/system (and audio reproduction may be considered as one).
Fortunately the contemporary digital systems provide excellent mechanisms that assist the design of a system that has not to be perfectly synchronous from the one end to the other.

Ian's design proves that there are ways to connect two different clock domains and get perfect results, with the only constraint of the buffer size.
But if you use the same clock for both the USB to I2S conversion system and the DAC, one very simple re-clocking system is enough (no buffer is needed).
The DAC will get all the bits jitter-free and you can have the clock(s) and re-clocking mechanisms really close to the DAC where is more important.

"Problems" like this should be the boost for better circuit designs that may not be simpler, but may provide better results than the "simplistic" ones.

[andrea_mori]

Originally Posted by sp502

But if you use the same clock for both the USB to I2S conversion system and the DAC, one very simple re-clocking system is enough (no buffer is needed).
The DAC will get all the bits jitter-free and you can have the clock(s) and re-clocking mechanisms really close to the DAC where is more important.

..subscribed.. exactly what I said some posts ago.

The asynchronous way (the FIFO buffer) is the right option if you cannot synchronized the DAC with the source (USB to I2S conversion or any other source).
Anyway, IMHO, the DAC (BCLK) should be feeded directly from the MCLK, as close as possible to the DAC chip. also if you are using an asynchronous re-clock like the FIFO buffer.

[bigpandahk]

Originally Posted by bigpandahk

Ian

When I connected an optical source to the SPDIF, it has lock LED on but no sound at the BIII, both Mute and Lock LEDs on BIII on, the system works perfectly with WaveIO connected to the I2S backdoor. Please HELP.

Ian

Same problem on the coaxial input, so only the I2S backdoor is working.