Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 206 - diyAudio
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Old 11th January 2013, 02:31 PM   #2051
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Quote:
Originally Posted by RollE2k View Post
This would be the best way to run it, but the problem for me is that i probably won't have enough room in my case (DAC will be together with my tube-linestage, w. AMB R-2R volume, input selector, PSU's and everything), so ian's SPDIF board will not fit the case, if it was smaller (like if the outputs were removed, and connectors were offboard) then it would work. I'll probably have to go for TP-4:1 MUX together with OTTO-2. If there isn't any other good alternatives out there.

Robert
I know the pain of DAC case layout when trying to fit all these boards together!!! I believe qusp is moving to a separate enclosure for PSUs. I've had enough hassles myself and I have a v-out dac (ES9023) so no IV stage and less than half the PSUs, though I do have 2 (compact) line buffers and 5 or 6 regulators.

I would really suggest rethinking the layout and enclosure selection to try to fit Ian's spdif board in there though if at all possible, it really is an excellent solution though I have no need for it myself (only one usb input on my dac).

Have a look at AR2's case layout earlier in this thread for ideas, it is really neat and he fully recommends the spdif board of Ian's.


Cheers,
Chris
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Old 11th January 2013, 02:42 PM   #2052
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Default FIFO with Red Baron DAC

Hello Ian,

after more and more questions from members who build my Red Baron DAC and how to connect your FIFO kit to the I2S input of it, now i had the time to read the whole thread.

1st a big applause and Chapeau to your outstanding project!

My own setup looks like this:

iMac/Pure Music/ALAC files --USB--> modified Teralink X2 --I2S--> 2x Red Baron with TDA1541A S1 double crown in parallel NOS mod. --> Tube-I-zator SRPP output stage

Click the image to open in full size.

I would like to use your S/PDIF interface board. The I2S backdoor would be connected to the Teradak I2S, witch should be no problem.

If i would like to use all sampling freq. from 44.1kHz up to 96kHz (X2 maximum) or 192 kHz (Wave I/O), i think it would be the best to use your SI570 Clock board with the isolating board.

Because i have Salas LV Shunts in my project, i would use two to power the FIFO and the Clock board.

I am not sure, if your I2S-PCM board brings any advantages in my setup.

Did you have any other recommendations for me, or did i forget anything?


Best regards,
Oliver
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Old 11th January 2013, 02:50 PM   #2053
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Oliver,

Did you have a chance to read through Ian's I2S to PCM board thread also? I think it would be worthwhile (and much shorter than this thread). Daughter board thread is here - Drive NOS AD1865/62,PCM1704/02/63,TDA1541 from FIFO: Universal I2S-PCM driver board

Here is a quote from Regal from that thread regarding the TDA1541 DAC that might be applicable to your DAC design:

Quote:
Originally Posted by regal View Post
For average NOS single chip TDA1541A build you wouldn't need this daughter board since the TDA1541 accepts 64fs blck i2S.

But for the high end NOS tda1541A it would be usefull for dual differential simultaneous mode using the offset binary. Some really fantastic measurements have been shown that dual differential TDA1541A helps cancel some of the TDA1541's tendancy to have extra 2H (see Tazz's threads.) Using thing daughter board rather than discrete work-arounds could prove very useful, ie. it really helps with the output stage. Dual differential mode done right (potentially with this daughter board) also takes you closer to an S2 grade tda1541 as far as measurements go.

The more I think about it I think we will all be crying for a dual differential simultanious offset binary mode for the TDA1541A, so might want to include it now.


Chris
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Old 11th January 2013, 03:20 PM   #2054
qusp is offline qusp  Australia
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Quote:
Originally Posted by roender View Post
The OSF is off in Sync mode
no it isnt, only if you dont give it enough bandwidth, or switch it off.

if you provide with 90.xx/98.xx OSF is still enabled up to 384khz

there is no 'sync mode'
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Old 11th January 2013, 03:27 PM   #2055
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Quote:
Originally Posted by hochopeper View Post
Oliver,

Did you have a chance to read through Ian's I2S to PCM board thread also? I think it would be worthwhile (and much shorter than this thread). Daughter board thread is here - Drive NOS AD1865/62,PCM1704/02/63,TDA1541 from FIFO: Universal I2S-PCM driver board

Here is a quote from Regal from that thread regarding the TDA1541 DAC that might be applicable to your DAC design:





Chris
Hi Chris,

thanks for the advice. I will hold the I2S/PCM board in mind, because i use not the dual differential simultaneous mode

Cheers,
Oliver
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Old 11th January 2013, 03:28 PM   #2056
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could be used for direct synchronous DEM reclocking as well perhaps? aah thats right I already asked that Q. TDA is grey area for me
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Old 11th January 2013, 03:55 PM   #2057
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Originally Posted by qusp View Post
could be used for direct synchronous DEM reclocking as well perhaps? aah thats right I already asked that Q. TDA is grey area for me
Hmm... The DEM-Reclock circuit from -ecdesigns- on my DAC is fed by the BCK. It has a small modification (12K+Schottky diodes).
This results in better synchronization. It also provides best perceived sound quality.

The BCK signal we have also from the FIFO...
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Old 11th January 2013, 04:08 PM   #2058
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Quote:
Originally Posted by dvb-projekt View Post
Hmm... The DEM-Reclock circuit from -ecdesigns- on my DAC is fed by the BCK. It has a small modification (12K+Schottky diodes).
This results in better synchronization. It also provides best perceived sound quality.

The BCK signal we have also from the FIFO...
yes, but he also played with oversampled DEM and different rates of freerunning DEM adjusted by capacitor values, easier to play with with software/firmware settings than logic and discrete circuits. it is a new way of thinking, stuff that would normally take quite some prototyping and trial error can be experimented with quickly enough to make real subjective comparisons without relying on audio memory.

this will be what Thorsten does, being a lover of FPGAs
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Old 11th January 2013, 04:13 PM   #2059
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Quote:
Originally Posted by qusp View Post
yes, but he also played with oversampled DEM and different rates of freerunning DEM adjusted by capacitor values, easier to play with with software/firmware settings than logic and discrete circuits. it is a new way of thinking, stuff that would normally take quite some prototyping and trial error can be experimented with quickly enough to make real subjective comparisons without relying on audio memory.

this will be what Thorsten does, being a lover of FPGAs
Thats true. I never touched again the DEM-Reclock circuit, because the sound result is awesome. But lets see what fun the FIFO brings
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Old 13th January 2013, 02:03 AM   #2060
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Need help with new crystek cchd957,

First of all, many thanks to Ian for this great product.. huge improvement to my system, im using a shigaclone for transport and without the fifo, the shigaclone sounds muddy. All i can say is that , the fifo withe generic xo greatly improved my system.

Now i installed the crystek clocks using the adapters, and it doesnt work anymore. output led and lock led on the spdif boards does not light up. If i install back the generic clocks, they work again..
Is there something that i have missed on the instructions?

Will post pics soon..

Thanks guys
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