Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 185 - diyAudio
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Old 3rd January 2013, 06:37 AM   #1841
ryanj is offline ryanj  Australia
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Quote:
Originally Posted by Julf View Post
No, I definitely don't think a PLL would be a better solution. I think the only true solution is end-to-end rate feedback on a higher level (such as provided by async USB).
The "concerns" have been clearly addressed and rejected in the last few pages by several members. I wonder if you have another motive.

Ian has kindly refused your request, maybe you should respect his decision.
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Old 3rd January 2013, 06:37 AM   #1842
Julf is offline Julf  Europe
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honestly who is using anything like a 1000ppm clock with fifo? most will be using 50ppm so 0.005%
Careful when quoting ppm values - most clock system ppm values are measuring short-term stability, as that is what matters for jitter and circuit function, but long-term absolute values are usually a different matter.
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Old 3rd January 2013, 06:51 AM   #1843
Julf is offline Julf  Europe
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Originally Posted by ryanj View Post
The "concerns" have been clearly addressed and rejected in the last few pages by several members. I wonder if you have another motive.
Such as?

Quote:
Ian has kindly refused your request, maybe you should respect his decision.
As I wrote (for some reason you seem to have quoted something completely unrelated): "As it is your design, you are of course free to do whatever you want", so yes, I respect his decision.

I have discussed one design decision and the implications of that decision. The consensus seems to be that while it is agreed that there is a theoretical issue, it won't be a problem in practice. I have no need to take this discussion any further.
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Old 3rd January 2013, 06:58 AM   #1844
ryanj is offline ryanj  Australia
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Originally Posted by Julf View Post
Such as?


Quote:
Originally Posted by Julf View Post
I have no need to take this discussion any further.
Agreed.
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Old 3rd January 2013, 07:21 AM   #1845
qusp is offline qusp  Australia
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ryan, I do share some of your frustration here that its being carried on soooooooooo long again, when its all been discussed several times, but no, I think Julf is just interested in a solution, its a 'problem' so he wants to solve it or at least discuss what the solution may be. hey thats fine but it is taking it a bit far to expect any changes or hardware updates to adress a problem that hasnt had any effect on anyone at all as yet.

Ian obviously tested all this long ago and simulated bad clocks etc, I gather he got bored before he was even able to force a problem with realistic values of input clock jitter. of course he could have taken the mythbusters approach and placed more and more unreasonable/unrealistic demands on the system till it breaks, but why?

as hinted at, I gather it either needs hardware modification, or exposing the source code in some way to display the information, so its totally Ians call on if/how to deal with that.

actually its my experience that most clock ppm specs are long term so thus have in the past been pretty useless to indicate close in phase noise. long term jitter is the easy one to get right afaik.
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Old 3rd January 2013, 07:38 AM   #1846
ryanj is offline ryanj  Australia
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Thanks Jeremy,

I'm usually on the side lines observing very closely as i let the experienced members discuss problems and solutions. But even myself as an intermediate amateur I can understand that it is not a problem if its not a problem.

Lets continue discussing meaningful problems and solutions instead. Ill be on the bench with my mouth shut.
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Old 3rd January 2013, 07:54 AM   #1847
qusp is offline qusp  Australia
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hehe no worries Ryan, agreed sticking to the discussion of meaningful problems is a good idea.

as hochopepper said, it is true that if we had access to this register that knows how full the memory is, it should be abe to be leveraged to determine the delay vs the input clock and thus provide matching delay for a video feed sync. thats a much more meaningful use of the information, for knowing how full the fifo is at any time, its a curiosity at best, I know from experience that it simply never happens given my use patterns.

we were talking about this some time ago wrt to the video sync possibilities and the possibility of adding such functionality to the si570, given it probably has access to the mentioned info on the fifo, as well as knowing what the current master clock frequency is, as well as having the spi ports needed most likely

Last edited by qusp; 3rd January 2013 at 07:57 AM.
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Old 3rd January 2013, 07:59 AM   #1848
ryanj is offline ryanj  Australia
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Point taken.

Although from Ians comments, it sounds like he has a few tricks up his sleeve that may even be hidden from us in the current version of the FIFO...
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Old 3rd January 2013, 09:08 AM   #1849
Julf is offline Julf  Europe
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Originally Posted by qusp View Post
I think Julf is just interested in a solution, its a 'problem' so he wants to solve it or at least discuss what the solution may be.
Indeed. As I explained earlier, my interest was driven by the fact that the buffer under/overrun situation is the argument usually quoted to justify the need for a samplew rate conversion, something I really want to avoid.

I have no better solutions or competing designs to push.

Quote:
it is taking it a bit far to expect any changes or hardware updates to adress a problem that hasnt had any effect on anyone at all as yet.
And I wasn't asking for any hardware changes - the discussion we had pretty much resolved my concerns, but as Ian was writing:

Quote:
But forgive me, I sill not decide if I'm gonna publish it. So, I have to keep it as secret for now, though that indicator already hidden inside your fifo board.
I was assuming that the functionality was already there, and no significant changes would really be needed.
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Old 3rd January 2013, 11:31 AM   #1850
qusp is offline qusp  Australia
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I take it that the calls are there and if we are lucky available on one of the headers, but that doesnt mean its just as flicking a switch. not everyone in the GB is capable of mods on SMD, or writing code to display or react to changes of status headers. At the same time it may be a function that many feel they may need, even though it isnt actually a problem in any reported case; so Ian may wish to avoid a rush of people wanting to send their fifos back for the update, for essentially nothing.

so even if it doesnt require a hardware respin, it can be more of a hassle, because people would BUY a hardware update, while firmware updates have so far been free....
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