Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter

[Bunpei]

Originally Posted by andrea_mori

Just another option, this is an OCXO from HCD, and its excellent performance in phase noise.

Do they have any plans for developping the same sort of OCXOs for 22.5792, 45.1584, 90.3168, 24.576, 49.152, 98.304 MHz?

[andrea_mori]

Originally Posted by Bunpei

Do they have any plans for developping the same sort of OCXOs for 22.5792, 45.1584, 90.3168, 24.576, 49.152, 98.304 MHz?

They don't develop any OCXO at frequencies suitable for digital audio. That's a custom part they makes on my specs.
BTW, if some folks was interested, we could do a group buy, at least 5 people for any frequency.
At this time I'm building a quiet regulator to supply the OCXO and compare it with other options such as Crystek, Tentlabs and my own design based on Laptech high performance AT-cut crystal.
I'll let you know the sonic results. Lab tests speak for themselves.

[MisterRogers]

I might be interested in joining a GB for this; if cost/performance is good.

[iancanada]

Originally Posted by andrea_mori

They don't develop any OCXO at frequencies suitable for digital audio. That's a custom part they makes on my specs.
BTW, if some folks was interested, we could do a group buy, at least 5 people for any frequency.
At this time I'm building a quiet regulator to supply the OCXO and compare it with other options such as Crystek, Tentlabs and my own design based on Laptech high performance AT-cut crystal.
I'll let you know the sonic results. Lab tests speak for themselves.

Thanks andrea_mori, yes, the PSU is really a challenging for OCXO, from what I know, usually the XO share power with the 'oven".

I'm looking forward to hearing your result.

Regards,

Ian

[iancanada]

1. I understand the application of the passive battery manage board may not be limited to powering the clock board. To avoid any damage by the power on surge current of charging big capacitors, I include an optional delayed relay to limit the possible high surge current. Even for a clock board, the surge current may still go high if there are some low ESR capacitors on board. The delay time now is 0.5s, but it’s adjustable.

2. Remove some options on V1.0 which may not be used for normal configuration. That makes it easier to setup, clean and less confusion.

3. To make it easier setting up battery arrays, I placed the battery and charger connectors on one side and the output and control voltage connectors on the other side. Stack on top of each other is also available.

All physical dimensions keep same no change.

Hopefully this passive battery management board V2.0 will be available together with the Si570 clock board.

Please let me know for any suggestion and comment.

Ian

[AR2]

Ian,

If only clock board is powered by batteries and delayed, is it possible for that to be the problem? Usually clock is the one that has to be powered up first before any other digital circuits? I think I recall info that DAC could have a problem if it powers up before the master clock?

[iancanada]

Originally Posted by AR2

Ian,

If only clock board is powered by batteries and delayed, is it possible for that to be the problem? Usually clock is the one that has to be powered up first before any other digital circuits? I think I recall info that DAC could have a problem if it powers up before the master clock?

Hi AR2,

You are right, the clock should be running priori to all other section of the system before the gone of the reset signal. However, the delayed realy will not delay the power up, it just limits the high surge current for a very short of time (the main realy already switched on). So, I don't think it will cause problem on the start up time of clock board. But I'll double check and make some real measurements on the power on time of the clock board after I get the PCB prototype.

The delayed realy is just an option, if the main relay can handle the surge current, then you may not need the delayed one. But for high current application such as powering a DAC analog power, the dealyed relay will help.

Ian

[bigpandahk]

Ian

As a battery management, should it automatically cut off the battery to prevent over discharge?

[iancanada]

Originally Posted by bigpandahk

Ian

As a battery management, should it automatically cut off the battery to prevent over discharge?

That should be the function of a charger. Passive battery management board need to be compatible with different kind of chemicals, as well as different voltage.

Ian

[AR2]

Originally Posted by iancanada

Hi AR2,

You are right, the clock should be running priori to all other section of the system before the gone of the reset signal. However, the delayed realy will not delay the power up, it just limits the high surge current for a very short of time (the main realy already switched on). So, I don't think it will cause problem on the start up time of clock board. But I'll double check and make some real measurements on the power on time of the clock board after I get the PCB prototype.

The delayed realy is just an option, if the main relay can handle the surge current, then you may not need the delayed one. But for high current application such as powering a DAC analog power, the dealyed relay will help.

Ian

Thank you Ian for the response.
AR2