Asynchronous I2S FIFO project, an ultimate weapon to fight the jitter - Page 15 - diyAudio
Go Back   Home > Forums > Source & Line > Digital Line Level

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 12th October 2011, 02:42 PM   #141
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Quote:
Originally Posted by 1audio View Post
Here is a very good one with info on how they work: PRS10 - Rubidium Frequency Standard
Dear 1audio,

You really have a wonderful deep understanding on Rubidium discharge lamp calibrated varactor tuned OCXO device. I appreciated your explanation very much.

I read
Model PRS10 - Rubidium Frequency Standard - Operation and Service Manual
and understood that its single calibrating interval is 200ms.
First, I'd be very happy if you could kindly tell me whether my understanding is correct or not.
Second, unfortunately, I have never found the corresponding description on a calibration interval for FE-5680A. Do you have any idea on the value for FE-5680A? How often do you think the base VCXO frequency, 50.255 MHz, is tuned for a Rubidium Physics Package?

Bunpei
  Reply With Quote
Old 12th October 2011, 02:58 PM   #142
1audio is offline 1audio  United States
diyAudio Member
 
Join Date: Mar 2004
Location: SF Bay Area
Blog Entries: 3
Bunpei:
You give me more credit than I'm due. My understanding is pretty limited. I believe the sweeping for finding lock only happens when the system is starting and it would stop when it has a good phase lock but I don't know. As the lamps get old the output decreases and the time to lock will increase. Most of the Rubidiums on eBay have had a lot of service and may be near the end of life for the lamps.
__________________
Demian Martin
Product Design Services
  Reply With Quote
Old 12th October 2011, 03:06 PM   #143
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Dear Demian,

Thank you very much for your immediate reply!

Bunpei
  Reply With Quote
Old 8th November 2011, 02:21 AM   #144
diyAudio Member
 
iancanada's Avatar
 
Join Date: Dec 2009
Location: Toronto
Default S/PDIF interface board for I2S FIFO project

To extend the applications of the FIFO project to the fields other than building or modding a DAC, I need an S/PDIF interface board. So, I designed this one. Working together with the I2S FIFO board and the clock board, it becomes an S/PDIF FIFO.

I use TI/BB new generation 216 KHz digital audio interfaces DIX9211 as the S/PDIF transceiver. Actually I built both DIX9211 and WM8805 evaluation boards in advance and did very carefully test before I made the decision. DIX9211 shows bit more stable on coaxial input running at 192 KHz, and it support 176.4 KHz more directly. Importantly, within DIX9211, the DIR and DIT are independent from each other. They have separate I2S ports and MCLK input and output, as well as the channel status buffers, which are the very basic requirements for an asynchronous S/PDIF FIFO. I’m very happy with the performance of DIX9211 so far, although the price is double.

S/PDIF driver is another very significant issue. People usually use CMOS driver such as 74HCU04 doing this kind of job. Functionally, there is no any problem. But I don’t think normal COMS buffers are suitable for low jitter application. Because the bi-phase mark code is mixed with both clock and date, it is very sensitive to the additive jitter along the transmission chain (that’s why the cable and the transformer could be heard). I use a balanced LVPECL driver driving the digital audio transformer into coaxial cable. The sound improved obviously than the CMOS driver, as well as the waveform after 5 feet cable with 75 ohm termination. I will give more details together with schematics and waveforms about this new S/PDIF driver solution later on. To eliminate the additive jitter generated by DIX9211 itself, S/PDIF signal need to be re-clock directly at finial stage by the MCLK from clock board.

The features of the this S/PDIF interface board are as below:

1. Three S/PDIF inputs: coaxial, optical and TTL, could be switched by a button;
2. Two S/PDIF outputs: coaxial and optical;
3. Support Fs (both input and output): 44.1 kHz/16bit(24bit ready), 48 kHz/16bit(24bit ready), 88.2 kHz/24bit, 96 kHz/24bit, 176.4 kHz/24bit, 192 kHz/24bit;
4. I2S FIFO interface;
5. MCLK input port to clock board with dedicated 50 ohm U.FL connector;
6. Low jitter LVPECL S/PDIF driver;
7. S/PDIF source LED indicators;
8. Lock indicator LED;
9. Front panel interface port available for all the LEDs and control button

Working with the FIFO board and clock board, 3 hours bit perfect loop test was passed with up to 192Khz/24 bit setup and for both coaxial and optical connection;

Please reference to the attached pictures. Please note, in the pictures, the FIFO board is already the second edition with S/PDIF board interface, optional U.FL I2S input and bug free.
Attached Images
File Type: jpg SPDIF2.JPG (515.1 KB, 1188 views)
File Type: jpg SPDIF1.JPG (518.0 KB, 1109 views)
File Type: jpg DIX9211.JPG (549.9 KB, 1082 views)
File Type: jpg LVPECLdriver.JPG (607.1 KB, 1035 views)
File Type: jpg SpdifFIFO.JPG (594.3 KB, 1042 views)

Last edited by iancanada; 8th November 2011 at 02:34 AM.
  Reply With Quote
Old 8th November 2011, 02:30 AM   #145
diyAudio Member
 
Join Date: Jan 2004
Location: Toronto, ON, Canada
Do the BNC connectors offer advantages over standard RCA?
  Reply With Quote
Old 8th November 2011, 02:43 AM   #146
diyAudio Member
 
Join Date: Jan 2006
Location: California
Nice looking board!
You know you could implement both S/PDIF RX and TX in the PLD with many benefits. Since you are running a FIFO, so there is no need for clock recovery function of a commercial receiver. In other word, their clock recovery performance is probably not going to make a difference. The open source S/PDIF RX works reliably under 192KHz input with 100MHz system clock. No problem with 176.4KHz, either. You probably don't care about channel status data. Even if you do, it is easy to copy the data from the RX side to the TX. There can be unlimited input channels, and you can still use external re-clocking and buffering for the TX.
Wait... Why would you use a TX since the S/PDIF format is inherent prone to jitter? Shouldn't the output of the FIFO go directly to the DAC?
  Reply With Quote
Old 8th November 2011, 02:55 AM   #147
diyAudio Member
 
iancanada's Avatar
 
Join Date: Dec 2009
Location: Toronto
Quote:
Originally Posted by 454Casull View Post
Do the BNC connectors offer advantages over standard RCA?
Hi 454Casull,

S/PDIF should be treated as RF signal and BNC usually comes with better impedance matching performance than the RCA, says 75 ohm. So, I think that would be one of the advantages.

RCA S/PDIF cables still work if we add BNC/RCA adapters over the BNC connector, I did this way during the functional testing.

Have a good night.
Ian
  Reply With Quote
Old 8th November 2011, 02:57 AM   #148
diyAudio Member
 
alant4321's Avatar
 
Join Date: Jul 2008
Location: Canada
Quote:
Originally Posted by 454Casull View Post
Do the BNC connectors offer advantages over standard RCA?
The digital transmission of BNC refers to AES at 24Bit/48KHz while RCA refers to S/PDIF at 20Bit/48KHz. [Reference] Some people have talked to me that the jitter of BNC is at the minimum in comparing to AES/EBU(Balanced) or S/PDIF. I have not see any research paper to support. In my practical listening test, I personally cannot hear any difference between BNC and RCA connection.
__________________
"To work smarter, but not to work harder." by alant4321
http://www.teco-audio.com
  Reply With Quote
Old 8th November 2011, 03:45 AM   #149
diyAudio Member
 
Join Date: Jan 2004
Location: Toronto, ON, Canada
Quote:
Originally Posted by iancanada View Post
Hi 454Casull,

S/PDIF should be treated as RF signal and BNC usually comes with better impedance matching performance than the RCA, says 75 ohm. So, I think that would be one of the advantages.

Have a good night.
Ian
Isn't this important only for video applications?
  Reply With Quote
Old 8th November 2011, 04:10 AM   #150
diyAudio Member
 
iancanada's Avatar
 
Join Date: Dec 2009
Location: Toronto
Quote:
Originally Posted by 454Casull View Post
Isn't this important only for video applications?
Impedance matching is very important for all high frequency RF signal transmission as well as clock signal. It's not for video 'only' . Actually S/PDIF signal is not a audio signal. It's kind of bi-phase mark code and should be look upon as a clock signal. If we don't have good impedance matching, the reflecting signal will be added over the clock and introducing more jitter. Ian

Last edited by iancanada; 8th November 2011 at 04:13 AM.
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off


Similar Threads
Thread Thread Starter Forum Replies Last Post
XMOS-based Asynchronous USB to I2S interface Lorien Digital Source 2129 28th August 2014 03:59 PM
exaU2I - Multi-Channel Asynchronous USB to I2S Interface exa065 exaDevices 1357 3rd March 2014 08:51 PM
DAC chip selection + I2S jitter questions drwho9437 Digital Line Level 2 26th July 2010 12:50 PM
Simple FIFO to I2S CPLD, for MCU players / reclocking KOON3876 Digital Line Level 21 19th September 2008 04:00 PM
asynchronous reclocking and low jitter clocks ash_dac Digital Source 3 8th February 2005 09:22 AM


New To Site? Need Help?

All times are GMT. The time now is 08:25 PM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright 1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2