Slew-rate induced distortion in SPDIF

[jkeny]

I have been reading some interesting posts about slew-rate induced distortion in SPDIF receivers & input circuitry & wondered about how general this effect might be & might it be one mechanism that explains how different SPDIF cables effect the sound?

Has anybody got any information on the slew rate of the common SPDIF receiver chips &/or input circuitry?

Here's some info I lifted from Audiocircle posted by Jneutron that gives a good overview (in this case he is talking about RF attenuators but you can extrapolate):

As I stated before, the input attenuator, when applied to an active node input, will reduce the non-linearities of the stage caused by a slew rate beyond the circuit's capability.

As I stated before, any reflections caused by an active node which make the double transit and arrive back at the active node, the leading edge of that bounce will propagate directly through the amp.

The net result will be an uncertainty in the leading edge. My understanding of spdif is that the clock is recovered using a pll, and that jitter in that clock will arrive at the audio out as noise. I cannot however, answer the question: is this jitter caused by active node reflections caused by excessive input slew rate sufficient to become audible..

The bounce, and the resulting uncertainty in the leading edge, will go away if the attenuator causes the input signal at the node to lower it's slew rate sufficiently to stop non linearities.

[jan.didden]

Interesting.
I've talked a lot to people like Guido Tent, known for his low-jitter clocks, and apparently the secret is in the loop response of the pll.
If the bandwidthg of that loop is wide enough to accomodate the jitter spectrum of the signal, it is nulled out. That would mean that with a good pll S/PDIF jitter would be nulled out.
However, I do not claim to be an expert on this so will yield to the real experts.

jan didden

[DF96]

Cable problems generally cause high frequency jitter. The PLL is designed to filter out high frequency jitter, so all you should be left with is the low frequency jitter coming from the CD player clock. The PLL acts as a low pass filter, so you want low bandwidth to filter out as much clock jitter as possible.

Reducing slew rate may reduce cable reflections, but can increase jitter in the receiver data slicer so there may be a need to adopt the best compromise. My guess is that the cable rise times should not be much greater than the response time of the data receiver: slower rise than this causes receiver-generated jitter, faster rise than this causes cable reflection jitter. Of the two, receiver-generated jitter is probably worse because it could include low frequencies which the PLL cannot filter out. So err on the side of more cable jitter - which may be the opposite of what some people say!

[SoNic_real_one]

I agree... the new receivers PLL loop and new DAC's internals can filter the high frequency jitter easily.
The low-frequency jitter, produced by the transport mechanism itself, is the hardest to "fix".
I would say that the "too high slew-rate" is not a concern if are used newer chips (both in receiver and DAC sections).

[DF96]

I think there would normally be buffering in the CD player, so the transport jitter should have no effect. It is the CD clock jitter which gets through to the DAC.

[jan.didden]

Originally Posted by DF96

Cable problems generally cause high frequency jitter. The PLL is designed to filter out high frequency jitter, so all you should be left with is the low frequency jitter coming from the CD player clock. The PLL acts as a low pass filter, so you want low bandwidth to filter out as much clock jitter as possible.

Reducing slew rate may reduce cable reflections, but can increase jitter in the receiver data slicer so there may be a need to adopt the best compromise. My guess is that the cable rise times should not be much greater than the response time of the data receiver: slower rise than this causes receiver-generated jitter, faster rise than this causes cable reflection jitter. Of the two, receiver-generated jitter is probably worse because it could include low frequencies which the PLL cannot filter out. So err on the side of more cable jitter - which may be the opposite of what some people say!

I believe some of the things I've seen from Guido are PLLs that filter from below 100Hz upward. And no, I don't work there and have no shares in the company

jan didden

[jkeny]

Been away for a little rest so couldn't comment

But what I hoped to follow up was the idea/premise, if I understand correctly, that fast rise time in SPDIF signals can cause non-linear distortions in SPDIF receivers because they are slew rate limited.

So this gives rise, in my mind, to some questions:
- what do people think of this? the posts above don't seem to address this, dealing more with PLL distortions.
- Any ideas what is the slew rate limits of the input stages of various SPDIF receivers?
- The advantage of faster rise times is that inter-symbol jitter is thought to be reduced - is this advantage offset by the above distortion mechanism?

Probably difficult questions to answer & maybe no definitive answers are possible but worth investigating?

[CosmoA]

There sure are a lot lot of "I think"s and "I believe"s in this thread and no actual references.


Time Distortions Within Digital Audio Equipment Due to Integrated Circuit Logic Induced Modulation Products

Authors: Meitner, Edmund; Gendron, Robert

AES E-Library Time Distortions Within Digital Audio Equipment Due to Integrated Circuit Logic Induced Modulation Products



Slew rate is not exact relevant for logic circuit since they digital circuits and not analog. That said, I will agree that you can have logic transitions that are too fast. The faster the edge rate the more attention to termination and decoupling that is required. Excessive switching speed will induce ground bounce, ringing, and RF noise in the digital circuitry which can induce jitter in the S/P-DIF interface. Reflections from improper impedance matching, pulse transformers, connectors, wire termination techniques, receiver hysteresis ( comparators use hysteresis to increase switching speed and increase noise reflection), and common mode noise between the digital source and the DAC make this interface a job left the a good RF designer. I have measure digital cable with impedance between 50 and 120 ohms and DAC S/P-DIF inputs from 35ohms to 150 ohms for interface that is specified to be 75 ohms. Putting a 50 ohm BNC connector with a few inches of 110 ohm twisted pair to the input receiver is typical. I get amused when everybody runs around screaming that the whole concept of the S/P-DIF interface is flawed when see its half *** implementation in a DAC costing five thousand bucks

For further details on logic Signal Integrity.
Signal Consulting, Inc. - Dr. Howard Johnson

[jkeny]

Originally Posted by CosmoA

There sure are a lot lot of "I think"s and "I believe"s in this thread and no actual references.

Agreed, but it's an area that hasn't been addressed in the literature - I believe

Time Distortions Within Digital Audio Equipment Due to Integrated Circuit Logic Induced Modulation Products

Authors: Meitner, Edmund; Gendron, Robert

AES E-Library Time Distortions Within Digital Audio Equipment Due to Integrated Circuit Logic Induced Modulation Products

Thanks for the reference on logic induced modulation but this is a different meachanism!

Slew rate is not exact relevant for logic circuit since they digital circuits and not analog.

Have to disagree with you here! The SPDIF signal has a P-P voltage over a certain rise time = a slew rate. If the input circuit of an active device is slew rate limited then distortion will enter the system at this point. I'm trying to tease out the parameters & possible effects of this potential distortion.

That said, I will agree that you can have logic transitions that are too fast. The faster the edge rate the more attention to termination and decoupling that is required. Excessive switching speed will induce ground bounce, ringing, and RF noise in the digital circuitry which can induce jitter in the S/P-DIF interface. Reflections from improper impedance matching, pulse transformers, connectors, wire termination techniques, receiver hysteresis ( comparators use hysteresis to increase switching speed and increase noise reflection), and common mode noise between the digital source and the DAC make this interface a job left the a good RF designer. I have measure digital cable with impedance between 50 and 120 ohms and DAC S/P-DIF inputs from 35ohms to 150 ohms for interface that is specified to be 75 ohms. Putting a 50 ohm BNC connector with a few inches of 110 ohm twisted pair to the input receiver is typical. I get amused when everybody runs around screaming that the whole concept of the S/P-DIF interface is flawed when see its half *** implementation in a DAC costing five thousand bucks

For further details on logic Signal Integrity.
Signal Consulting, Inc. - Dr. Howard Johnson

Agree completely with your views on RF & the implementation issues you encountered in digital audio. What I was hoping to start was a discussion on a potentially new SPDIF problem not identified in the Dunn & Hawksford paper Is the AES/EBU-S/PDIF Digital Audio Interface Flawed?

[CosmoA]

I am reminded of the quote "Everyone talks about weather but no one does anything about it." Rise time and slew rate are not really the same thing. I will leave new distortion mechanisms to the "academics" since no one seems very interested in fixing the known ones. Not trying to be insulting but these discussions go nowhere without some solid engineering knowledge and in this case, experience with digital signal integrity.

Back to your regularly scheduled discussion.