A question about receiver and dac xtals

[gaetan8888]

Hello

Wen doing a reclock and wen we use a receiver chip (WM8804) who use a different xtal frequency than the dac chip reclock xtal, does it do a problems like drop bit or else ?

Thank

Bye

Gaetan

[oshifis]

Asynchronous reclocking always causes missing/duplicate bits every n seconds. Whether it is audible, is a different question.

[gaetan8888]

Hello

Here's some details.

I've just buy two WM8804, one to mod a friend's cd player, and the other one for my diy dac to replace a CS8414.

For my dac it's like this:

WM8804 (12 mhz crystal) --> SAA7220 (11.2896 mhz clock) --> 74VHC175 reclock (11.2896 mhz clock) --> TDA1541A

Thank

Bye

Gaetan

[Ken Newton]

If I correctly understand your question then the answer is, no, the additional crystal will not cause any more issues than are already caused by asynchronous re-clocking. The WM8804 utilizes a crystal as an external frequency reference for it's internal PLL clock-recovery circuit operation. This second crystal is not used to alter the the embedded clock domain of the received S/PDIF signal, nor will it cause the WM8804 to drop bits. The Wolfson receiver chips offer superior jitter rejection performance.

I suggest that you drop the whole asynchronous re-clocking scheme, as it actually increases total jitter. Instead, synchronously re-clock using the low jitter MCLK output signal of the 8804. This should dramatically reduce total jitter relative an asynchronous re-clocking scheme.

[oshifis]

Well, in this case you have to use the CLKOUT as the clock source (programmed to 11.2896 MHz) for the SAA7220, not the 12 MHz crystal. You can use CLKOUT also for reclocking BCK.

[gaetan8888]

Hello

I will use the WM8804 in harware mode only.

I will look in the data sheet to try to see how to get a 11.2896 mhz clock out from the WM8804 to feed the SAA7220 and the 74VHC175.

Thank

Bye

Gaetan

[Ken Newton]

Originally Posted by gaetan8888

Hello

I will use the WM8804 in harware mode only.

I will look in the data sheet to try to see how to get a 11.2896 mhz clock out from the WM8804 to feed the SAA7220 and the 74VHC175.

Thank

Bye

Gaetan

You should be able to obtain a synchronous, low-jitter, 11.2896MHz clock directly from the MCLK pin as the WM8804 receives a 44.1KHz sample rate input signal. MCLK must be configured to output a 256Fs mode clock. Check the datasheet hardware master mode configuration options for MCLK.

[gaetan8888]

Hello

I will have two DAC using WM8804, one for my cd player digital output, and the other one will be use for the digital output of my JVC DVD player. So, one DAC will receives a 44.1KHz sample rate input signal, and the other one will receives a 48KHz sample rate input signal.

Does it worth it to use an external 12 mhz clock for the WM8804 ?

Thank

Bye

Gaetan

[SoNic_real_one]

The 12MHz xtal, in receiving mode, is used just to measure the incoming signal data rata and signal it further to a DSP... Also it is used to generate the internal "free runing" frequency, but the PLL loop is the one that ultimatelly decides the jitter and output data - by locking and following the input signal. The Xtall is NOT used for any "reclocking".

But you HAVE to use the 12MHz xtall, cannot "skip it", because you are talking about the hardware mode...

[jkeny]

You need the OSC to generate the oscillator clock for the PLL input.