Gigawork DAC problem - L/R phase shift

[schurli07]

Hi

I have a problem with my new Gigawork DAC.
Digital receiver – CS8416
Digital converter – CS4398
Up sampling chips – CS8421
USB IC – PCM2902

I measured the left an right output channel from a frequency sweep (PC over USB)

With my scope I noticed that there is a phase shift between the L/R channel which is frequency dependent.

50Hz input sine ... nearly nothing
10kHz input sine ... phi/2 (as you can see below)
20kHz input sine ... phi

In the first picture below you can see the L/R output after DAC CS4398.
In the second picture you can see the L/R output after OP 5532.
f_in = 10kHz

You can see that both pictures are the same, except the gain from the OP 5532.

I also measured my standard Laptop soundcard L/R output and there is no phase shift... so i think that there is something wrong with my Gigawork DAC.

Please help me

[Trevor White]

Are you saying there is a difference between the left and right channels ??

[schurli07]

Yes! There is a difference!
The phase shift cause that your L/R speakers will output time shift music!

UPDATE:
This phase shift is only caused by USB link.
No phase shift on Coax, SPDIF!

[schurli07]

Can someone check if he has the same problem with the USB Chip?

[Trevor White]

could it be the software that is feeding the USB port ?

sounds like there is a constant time delay between channels.

[schurli07]

No, i don't think that this is a software error.

First tested with *.mp3 sine files from Windows Media Player and then with "Test Tone Generator". Also tested from different PC's.

If somebody has a scope please test your USB feeded DAC!

[schurli07]

Please check this...



I think I found some errors in the schematic from the delivered CD.

CS8416
1.) VL+ is 3,3V on my board (not 5V)
2.) The SPDIF jack on pin RXP1 deliver a 5V Signal which is over the Absolut Maximum Ratings (Vin = VL + 0,3V = 3,6V max!!!)

CS8421
1.) VD should be 2,5V (3,3V is not recommended but ok; Absol.Max.Rating = 3,5V)
2.) SAOF have wrong resistor.


Following resistor config is on my board:
SAIF… 1kOhm (I²S up to 32-bit data)
SAOF… 8,06kOhm (I²S 32-bit data)
MS_SEL… 1,96kOhm (Master (128 x Fso))
(note: SAOF and MS_SEL resistors are wrong placed in the schematic but not on the board)

In my opinion following there should be following resistor config:
SAIF… 1kOhm (I²S up to 32-bit data)
SAOF… 4,02kOhm (I²S 24-bit data)
MS_SEL… 1,96kOhm (Master (128 x Fso))

The successive CS4398 can only handle up to I²S 24-bit data!!! (not 32bit)



All statements refer to the chip datasheets and my measurement!

[schurli07]

Update:

My mentioned CS8421 32bit problem doesn't matter:

I²S form Wikipedia:
"If the Transmitter is sending 32 bits per channel to a device with only 24 bits of internal precision, the Receiver may simply ignore the extra bits of precision by not storing the bits past the 24th bit. Likewise, if the Transmitter is sending 16 bits per channel to a Receiving device with 24 bits of precision, the receiver will simply Zero-fill the missing bits. This feature makes it possible to mix and match components of varying precision without reconfiguration."

[schurli07]

Does nobody have time, scope & Gigawork DAC?

[Zoodle]

Can someone repeat Schurli's test? And can anyone confirm his findings in #7? The designer is pushing some parts beyond limits? (long term reliability issue)