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Old 17th January 2011, 10:48 PM   #41
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Quote:
Originally Posted by regal View Post
I've tried big air coil inductors for dac analog filtering but they always pick up hum, never found a shielded air core. I believed they sounded better but it was tough to say for sure with the hum.
I have never had any hum from coils.
Even with unshielded interconnects to power amplifier.
And even with the bad grounding.
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Old 20th March 2011, 10:25 AM   #42
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Originally Posted by hotiron View Post
Guys I've been messing with this for a while now and could never get it to work
(single inverter) I was was getting a lot of noise in the non inverted channel.
However after some more fiddling last night I had success ,initial listening sounds promising
I'm using CS8414 74VHC04 PCM56P
See schema below.
Is this scheme really working ? And can i use CS8416 ?
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Old 21st March 2011, 11:25 AM   #43
hotiron is offline hotiron  Scotland
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Yeah. This scheme is really working and working really well.
I prefer it to TDA1541. Its also very easy to build on stripboard.
I have never used CS8416 So cant say if it works or not without trawling through datasheets.
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Old 7th February 2012, 10:51 AM   #44
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CS8416 has :
24-bit, left-justified
24-bit, I2S
24-bit, right-justified
Direct AES3
PCM56p is :EIAJ STC-007-COMPATIBLE

Hm that does not show what kind of parallel interface is using PCM56p?
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Old 8th March 2012, 12:25 PM   #45
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Originally Posted by Krokotam_ View Post
CS8416 has :
24-bit, left-justified
24-bit, I2S
24-bit, right-justified
Direct AES3
PCM56p is :EIAJ STC-007-COMPATIBLE

Hm that does not show what kind of parallel interface is using PCM56p?
Hi, PCM56P is using serial interface. Check page no. 7 of the datasheet for waveforms. Should be farely easy to obtain from I2S. I will give this thinggy a try as soon as I get the chance and will let you know of the results.
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Old 24th March 2013, 08:33 PM   #46
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Originally Posted by Bernhard View Post
Here is glue logic for use between cs8412 and pcm56, it avoids interchannel delay.
It can be found with google.

Click the image to open in full size.
Strange, in my dumbness I thought the LE would have to be inverted between the two PCM5* chips, such each chooses a different channel (that is also the schema I have in a Sony player); and here in this diagram there is a same LE and a difference in CLK.

Who can help me here?
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Old 25th March 2013, 02:10 AM   #47
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Channels should convert in sync without interchannel delay. So better not invert the LE. One channel has the bit clock gated with LE to avoid loading data from the wrong channel.
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Old 26th March 2013, 08:57 AM   #48
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Originally Posted by Bernhard View Post
Channels should convert in sync without interchannel delay. So better not invert the LE. One channel has the bit clock gated with LE to avoid loading data from the wrong channel.
Thanks, Bernard, does this mean that it is not recommended to use a reclocker with LE inversion like this one Russian Reclocker?

It looked so tempting albeit expensive
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