My take to the "Reference" TDA1541A DAC with I2S-BUS architecture

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That would be one way, yes. But with the shunt regulators for each power line, you don´t get it much smaller.

Think about a 8x TDA, than we would have a skyscraper witch won´t fit in any case.

The outline of this module is about 125x125mm, so a compact design. As i posted before,

i won´t change my base concept. So i will try to insert the DEM-reclock, but will the 74HC02 drive all DAC´s on it´s output,

or do we have a 74HC02 for each DAC´s if we use more than one?

Do you have some experiences with the I2S attenuator after the buffer? I don´t know if it is necessary after it. :(

One Salas shunt regulators should be ok for 8XTDAs and individual TL431 shunt regulators on each small TDA module.
For the Dem- reclock, from what I saw from EC's threads, 1 X 74HC02 should be able to do the job.
Leave I2S attenuator after the buffer as is, you can bypass it anytime.

8x TDA, not necessary to be a skyscraper, if you can place it horizontally with a bridge board to the base module.

:rolleyes::rolleyes::rolleyes:
 
So we have this schematic! But if we have more than one board, how is the connection than? Should i insert this schematic on the module, so every 1541A has it´s own or extenal (one re-clock circuit for all DAC´s)?

What about the I2S attenuator? Is it still necessary in a buffered input like on my module?
dvb-projekt: Re: the attached schematic with this message ... I could not find the info in the screen capture you posted. Was this a PM exchange?
Question: Is the I2S-BUS attenuator necessary if one is re-clocking those lines?
Thx
155488d1264535904-my-take-reference-tda1541a-dac-i2s-bus-architecture-screen-capture.jpg
 
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Hi hollowman,

the two schematics from ecdesigns (DEM Clock/I2S Attenuators) are for one TDA1541A.
If i want to build up more than one TDA1541A with the DEM Clock, must i have a 74HC02 for each TDA1541A or is one enough?
If i could do it with one, how is the connection to the other DAC´s?

My second question is about the I2S Attenuators.
If you look on my post #1, you will see that i have a use a buffer IC between the I2S Input on the pcb and the TDA1541A.
Should i cancel the buffer and insert the attenuators instead?
 
Hi hollowman,

the two schematics from ecdesigns (DEM Clock/I2S Attenuators) are for one TDA1541A.
If i want to build up more than one TDA1541A with the DEM Clock, must i have a 74HC02 for each TDA1541A or is one enough?
If i could do it with one, how is the connection to the other DAC´s?

My second question is about the I2S Attenuators.
If you look on my post #1, you will see that i have a use a buffer IC between the I2S Input on the pcb and the TDA1541A.
Should i cancel the buffer and insert the attenuators instead?
Sorry I wasn't clear -- this is what I meant:
I searched for the text in screen-capture image you posted. I could not find the comments from ecdesigns on this forum. Was this from a PM exchange?

Thx for the info that responded with.
 
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The Panasonic FM 1.800µF/35V caps and the Fairchild stealth diodes are in place.

I am just waiting to the Mundorf Supreme 0,1µF decoupling cap and the Kiwame bleeder resistor, to finish the pcb.

An externally hosted image should be here but it was not working when we last tested it.



Also the TDA1541A Shunt-Regulator PCB is ready.
Just the Takman REX-Series carbon film resistors, Kiwame 5W resistor (current adjust) and the small Wima caps still missing.

An externally hosted image should be here but it was not working when we last tested it.



Lets see when the parts arrive...:rolleyes:


Here the complete kit:

An externally hosted image should be here but it was not working when we last tested it.



Complete four rails. Three for the TDA1541A (+5V, -5V, -15V) and one (+5V) for additional digital parts (USB to SPDIF, TDA1541A reclock circuit ect.)

The separate small Shunt Regulator for the 4th +5V line i am still soldering.
 
Hi,

If i want to build up more than one TDA1541A with the DEM Clock, must i have a 74HC02 for each TDA1541A or is one enough?

I would suggest one per each TDA1541. Keeps the local current loops local.

Also, you can get small SMD dual Gates (e.g. 74LCV0G02 IIRC) that can be fitted easily.

My second question is about the I2S Attenuators. If you look on my post #1, you will see that i have a use a buffer IC between the I2S Input on the pcb and the TDA1541A.
Should i cancel the buffer and insert the attenuators instead?

Well, first, the Attenuators have a clear function. The internal logic of the TDA1541 is bipolar differential current steering, very much like ECL type Logic, just not following any specific ECL standard.

If you drive the Inputs with a full TTL signal the DAC will work, but the logic circuits will saturate and there will be noise leakage into the IC substrate.

So attenuators are desirable. As you will be driving many TDA1541 in parallele buffering the bus with maybe a suitable fanout system is likely a good idea.

I have tried ecdesigns I2S attenuators and DEM reclocking recently and can attest that they work rather well for the comparable simplicity.

As they are easily retrofittable to anything that had a SAA7220 in place which was removed to make space for Non-Os on a small Veroboard that takes the place of the SAA7220 they constitute an easy and extremely worthwhile upgrade for most TDA1541 based CD-Players and should be included in any new design.

Around 5 Years ago I worked on the same problems for a commercial design with the TDA1541. The circuits used there are by far more complex to implement, but they perform a little better. However getting them to work correctly required careful temperature compensation and complex power supply arrangements (and no, I am not at liberty to disclose the solutions arrived at).

Ciao T
 
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Hi Thorsten,

i am very pleased to get a response from "The Mastermind" himself! :worship:

So i will insert the Buffer IC on each DAC-Module and the I2S attenuator after it.

I am not sure if the shunt regulators on the DAC-Module are truly necessary, if
i power it up with the Salas Shunt´s.... :rolleyes:

Perhaps you have a recommendation.


Best regards,
Oliver
 
Hi,

So i will insert the Buffer IC on each DAC-Module and the I2S attenuator after it.

Perhaps better to add one set of buffers on the main board. The problem is that adding loads always adds jitter and disimproves the waveforms.

But adding gates or buffers in series also adds jitter.

So the best solution is probably just using one TDA1541 (I hear no real improvement from paralleling them, once all other issues have been addressed, but if you must have multiple TDA1541 you have to give up something.

So I guess using one buffer to drive eight more which can drive the I2S lines to 8 pcs TDA1541 might be the way to go.

I am not sure if the shunt regulators on the DAC-Module are truly necessary, if i power it up with the Salas Shunt´s...

Well, I do not really know if in the application the Salas Shunts are better/good enough, I would drive the 431 shunts with current sources and set them up with bypassed divider. This works quite well.

So I guess I would add a CCS and 431 for each power pin on the 1541 Module, if I was trying to do what you are attempting.

Ciao T
 
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Hi,

Perhaps better to add one set of buffers on the main board. The problem is that adding loads always adds jitter and disimproves the waveforms.

But adding gates or buffers in series also adds jitter.

So the best solution is probably just using one TDA1541 (I hear no real improvement from paralleling them, once all other issues have been addressed, but if you must have multiple TDA1541 you have to give up something.

So I guess using one buffer to drive eight more which can drive the I2S lines to 8 pcs TDA1541 might be the way to go.

If i understand you right, it make sense to take the Buffer off the Module and let only the DEM-Reclock and the I2S Attenuator on it.

If i would like to add more TDA´s, i could make an external Buffer-Module witch i could insert between Doede´s SPDIF-Board and the DAC-Modules, right?

Best,
Oliver
 
Hi,

If i understand you right, it make sense to take the Buffer off the Module and let only the DEM-Reclock and the I2S Attenuator on it.

Yes.

If i would like to add more TDA´s, i could make an external Buffer-Module witch i could insert between Doede´s SPDIF-Board and the DAC-Modules, right?

In essence - yes. But I am suggesting integrating the buffer and receiver and related stuff, plus the "backplane" that carries clocks, data, grounds, powersupplies to each TDA1541 Module and perhaps making the system plug-in capable similar to the Cambridge Audio CD2, in mechanical terms (see Lampizator's site for Photos).

Ciao T
 
Hi,

BTW, witch voltage difference between the CCS and the 431 do you recommend?

This depends a lot on the actual CCS Circuit.

If you use a so-called "Ring of Two", you can probably run as little as 1.5V across the CCS. If you use something a LM317 you need around 2.5V minimum (not that I recommend them, but they can be used for simplicity, when combined with some ferrites and a nice largeish value choke).

If you use something like a C4S you need to plan for around 6V at least, depending on the precise configuration.

I do not find that going much past the minimum voltage improves performance. I always use a pre-regulator to deal with mains voltage drifts etc. so dropout and such is taken care of there.

Ciao T
 
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Well, I do not really know if in the application the Salas Shunts are better/good enough, I would drive the 431 shunts with current sources and set them up with bypassed divider. This works quite well.

So I guess I would add a CCS and 431 for each power pin on the 1541 Module, if I was trying to do what you are attempting.

Ciao T

The V1.0 simplistic is intrinsically 1/200 Zo at least VS best sample TL431. Also the TL gets 3 times noisier than its 50nVsqHz quote at lows when run beyond 1mA Ik.
Now, everything is implementation. If someone manages to project the performance by proximity or correct sensing to the nodes of interest, then 1 mOhm territory Zo can work towards natural decoupling between them with just one reg. Else, the compactness of the many local TLs approach can cater for proximity and the isolation you shoot for.

Regards
 
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The V1.0 simplistic is intrinsically 1/200 Zo at least VS best sample TL431. Also the TL gets 3 times noisier than its 50nVsqHz quote at lows when run beyond 1mA Ik.
Now, everything is implementation. If someone manages to project the performance by proximity or correct sensing to the nodes of interest, then 1 mOhm territory Zo can work towards natural decoupling between them with just one reg. Else, the compactness of the many local TLs approach can cater for proximity and the isolation you shoot for.

Regards

Hi Salas,

so if i design the powerlines as short as possible to the TDA, normally i could cancel the noisier TL431 and drive the module directly, right?

:cheers:
Oliver
 
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