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Old 19th October 2009, 04:30 PM   #1
Bengali is offline Bengali  United States
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Default CS8416 PLL Values

Hi,

I bought the current version of the ebay DAC kit LM-DAC3.

Per previous posts, the CS8416 datasheets shows the following as
recommended values.

RFLT 3K
CFLT 22nF
CRIP 1nF

The values on my board have 1K, 220nF and 10nF.

How does it sound with incorrect PLL values? Per the seller,
the values have been adjusted per their design. I'm trying
to confirm if I should replace them with the values from
the datasheet or leave as is.

The sound quality of the stock DAC using coax sounds very similiar
to the outputs of my analog player.
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Old 10th November 2009, 05:05 AM   #2
bbp is offline bbp  China
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Hi bengali, maybe you can refer to the AN159 from CS ^_^
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Old 10th November 2009, 05:32 PM   #3
Bengali is offline Bengali  United States
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Hi bbp,

that app note is not for the same chip though. I'll stick with the values on the datasheet. have yet to try it and see what happens.

thanks for the suggestion.
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Old 11th November 2009, 03:33 AM   #4
bbp is offline bbp  China
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I check the dataeet for CS8416‘s

Extensive use of power and ground planes, ground
plane fill in unused areas and surface mount decoupling
capacitors are recommended. Decoupling capacitors
should be mounted on the same side of the
board as the CS8416 to minimize inductance effects,
and all decoupling capacitors should be as
close to the CS8416 as possible. Refer to AN159
for examples of proper techniques.
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Old 11th November 2009, 04:23 PM   #5
Bengali is offline Bengali  United States
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thanks for looking.

It's a stock board from ebay so I'm not concerned about layout. it's just that they used certain values that are not the same as the cs8416 datasheet so I will try changing to values on the datasheet.
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Old 11th November 2009, 05:03 PM   #6
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This could be useful...
Click the image to open in full size.

To lower the jitter you could directly attach the pll filter to the 7 and 8 leg of CS8416, it should look like this :
Click the image to open in full size.
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Old 11th November 2009, 08:00 PM   #7
johnm is offline johnm  United Kingdom
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The above table is now considered incorrect - please see attachment.

FWIW I updated the PLL components on my 24/192 chinese DAC and could detect no audible difference at all.

Cheers,

- John
Attached Files
File Type: pdf CS8416errata PLL VALUES (CORRECT!).pdf (35.0 KB, 138 views)
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Old 12th November 2009, 02:44 AM   #8
bbp is offline bbp  China
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Again, if you use the recovery MCLK of this chip, that maybe not precision enough for your system. 200 ps is not a acceptable value today.

In my opinion, a crystal which includes low phase jitter should be added, either in the DF stage or the DAC stage.
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