Hello,
I have trouble to find accurate description of SDIF-2 and SDIF-3 for DSD.
I mean, for the ESS chips are 3 inputs: Clock, Left and Right.
SDIF-2 is supposed to be 3 wires too, but I couldn't find the specs anywhere - I found them to pass PCM over it, no one ever comfirmed that it was 3 wire or 2 wires.
SDIF-3 is seen as 2 wires with embedded clock (like SPDIF, biphase). Specs are published by grimm audio, and they say in the same document that it uses 3 lines and that it uses 2 lines - hey, is it biphase or is it seperate clock in the end??????
Could someone enlighten me on these interfaces, and maybe point me the real interface specifications?
Thank you,
Nicolas
I have trouble to find accurate description of SDIF-2 and SDIF-3 for DSD.
I mean, for the ESS chips are 3 inputs: Clock, Left and Right.
SDIF-2 is supposed to be 3 wires too, but I couldn't find the specs anywhere - I found them to pass PCM over it, no one ever comfirmed that it was 3 wire or 2 wires.
SDIF-3 is seen as 2 wires with embedded clock (like SPDIF, biphase). Specs are published by grimm audio, and they say in the same document that it uses 3 lines and that it uses 2 lines - hey, is it biphase or is it seperate clock in the end??????
Could someone enlighten me on these interfaces, and maybe point me the real interface specifications?
Thank you,
Nicolas
There is quite a lot of information to be found on the Twisted Pear Audio site about their latest incarnation of the Buffalo Dac which uses the new version of the ESS dac chip. It is possible that the schematics and manual provided there might answer some of your questions.
Link here: http://www.twistedpearaudio.com/digital/buffalo.aspx
Link here: http://www.twistedpearaudio.com/digital/buffalo.aspx
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Thank you, but unfortunately they do not. I should try to ask ESS directly to know wether their unit can do direct SDIF-3 decoding/clock extraction, but I'd first have a real description of this format: is it with a seperate clock or not????
I never used SDIF2 nor SDIF3, never had the need for it, but some have it, so I want to be able to design for it.
Thank you,
Nicolas
I never used SDIF2 nor SDIF3, never had the need for it, but some have it, so I want to be able to design for it.
Thank you,
Nicolas
Strange stuff this SDIF interface. There is nothing much to be found about it on the internet.. Just that it used BNC and is only for one channel (so you needs to SDIF connections for stereo).
What do you want with it? I don't think that you will find any modern device using it.. Any DSD device having a digital output will probably be some modern link like Firewire (DenonLink) or something else.
What do you want with it? I don't think that you will find any modern device using it.. Any DSD device having a digital output will probably be some modern link like Firewire (DenonLink) or something else.
Well, I would just provide compatibility with SDIF-3 featured SACD players.
Yes, appart than it needs a wire per channel, there's not much to be found. Level etc...? Can we trust on that a paper that says both that it has embedded clock and that it needs an external one?
What I can find is that on the rear of sdif-3 players are only two BNCs. As it needs one for each channel, I can think that it is indeed biphase encoded. Thus needs a PLL to extract the clock and send it to the ESS DAC.
But that's not much to make an interface! Why can't we find any paper on this interface? It seems to be a standard, so there MUST be a published paper... Why can't I find one?
If anyone has extra information...
Thanks
Nicolas
Yes, appart than it needs a wire per channel, there's not much to be found. Level etc...? Can we trust on that a paper that says both that it has embedded clock and that it needs an external one?
What I can find is that on the rear of sdif-3 players are only two BNCs. As it needs one for each channel, I can think that it is indeed biphase encoded. Thus needs a PLL to extract the clock and send it to the ESS DAC.
But that's not much to make an interface! Why can't we find any paper on this interface? It seems to be a standard, so there MUST be a published paper... Why can't I find one?
If anyone has extra information...
Thanks
Nicolas
Well, yes there are! Not much though. I think of stuff like that:
http://www.tascam.de/fr/index.php?page=dv-ra1000.html
And sony equivalents. There were consumer products fitted with it too.
Anyway I'll make this interface as an optional dongle as chances are I will never have to design it (well, unfortunately, I know of someone who wants me to have this SDIF interface for his SACD player... sheet).
But I can't understand how something that became rather widespread (I mean, look at PRISM converters, they all feature SDIF-3, as do all EMM equipment too...) can't be described somewhere. It MUST be.
The question being: where?
I will send an email ton Mr Meitner, maybe he could provide me this information.
http://www.tascam.de/fr/index.php?page=dv-ra1000.html
And sony equivalents. There were consumer products fitted with it too.
Anyway I'll make this interface as an optional dongle as chances are I will never have to design it (well, unfortunately, I know of someone who wants me to have this SDIF interface for his SACD player... sheet).
But I can't understand how something that became rather widespread (I mean, look at PRISM converters, they all feature SDIF-3, as do all EMM equipment too...) can't be described somewhere. It MUST be.
The question being: where?
I will send an email ton Mr Meitner, maybe he could provide me this information.
Did you see this document: http://www.grimmaudio.com/whitepapers/sdif3v10.pdf ?
It sais: one channel per SDIF-3 interface, and separate worldclock, meaing you have three BNC connections, corresponding with L, R en WCLK.... I guess this can almost be directly fed into the Sabre, you'll just need to decode the phase encoding
It sais: one channel per SDIF-3 interface, and separate worldclock, meaing you have three BNC connections, corresponding with L, R en WCLK.... I guess this can almost be directly fed into the Sabre, you'll just need to decode the phase encoding
Well yes I seen this paper, this is why I started this thread, but:
- Why can you only see 2 BNC on SDIF-3 commercial equipment? There is a "wordclock" input the other side of it, but if it would be for SDIF-3, why not putting them side to side?
- Why using biphase if you send the clock seperately?
So,
- Is this paper accurate?
- Why can you only see 2 BNC on SDIF-3 commercial equipment? There is a "wordclock" input the other side of it, but if it would be for SDIF-3, why not putting them side to side?
- Why using biphase if you send the clock seperately?
So,
- Is this paper accurate?
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I think I got the answer:
http://www.ams-neve.com/Sites/8/Files/Documents/Outboard/1073DPA_DPD_User_Manual.pdf
PDF page 7
DSD
Selecting DSD will default to 44.1kHz reference. If no sync is available it will use the internal crystal
reference.
The interface requires a minimum of two BNC cables (DSD L and DSD R) to the DSD DAC.
The DSD output is switchable between SDIF2 and SDIF3 with the rear panel dip switch. SDIF2
requires a 44.1kHz sync signal to be passed to the DAC and this should preferably come from the
1073DPD sync output via a third BNC cable. SDIF3 transmits the DSD signals with clock
information included and should not need the sync signal.
Refer to your DAC for compatibility information.
That shows that:
- SDIF-2 is a 3-wire transmission, with a 44.1kHz wordclock (while the ESS waits for a bit clock) => a PLL is needed
- SDIF-3 is biphase encoded, thus doesn't need an external sync line. A PLL will be needed to extract the clock from the datastream.
But that still needs to be comfirmed
http://www.ams-neve.com/Sites/8/Files/Documents/Outboard/1073DPA_DPD_User_Manual.pdf
PDF page 7
DSD
Selecting DSD will default to 44.1kHz reference. If no sync is available it will use the internal crystal
reference.
The interface requires a minimum of two BNC cables (DSD L and DSD R) to the DSD DAC.
The DSD output is switchable between SDIF2 and SDIF3 with the rear panel dip switch. SDIF2
requires a 44.1kHz sync signal to be passed to the DAC and this should preferably come from the
1073DPD sync output via a third BNC cable. SDIF3 transmits the DSD signals with clock
information included and should not need the sync signal.
Refer to your DAC for compatibility information.
That shows that:
- SDIF-2 is a 3-wire transmission, with a 44.1kHz wordclock (while the ESS waits for a bit clock) => a PLL is needed
- SDIF-3 is biphase encoded, thus doesn't need an external sync line. A PLL will be needed to extract the clock from the datastream.
But that still needs to be comfirmed
Thank you.
It should be on some IEC paper, but I can't find it...
Further inspection into the ESS datasheet showed that it will accomodate for both biphase and normal encoded DSD Data, but will anyway require a bit clock at the DSD Fs.
From the grimm's paper:
3.Overview
This interface is based upon 75ohm BNC, unbalance transmission, 1channel in one cable and
externalwordclock(WCK).Anditsbitrateis5.6448MbPS(fsdsd=2.8224Mbps)or
11.2896Mbps(fsdsd = 5.6448Mbps). Transmission is 1channel unbalance transmission and it
uses word clock as synchronization technique.
BUT
5-1 Modulation Method.
Phase Modulation
Bit rate= 5.6448Mbps when fsdsd is 2.8224MHz.
=11.2896Mbps when fsdsd is 5.6448MHz.
So this document fails to make the difference between sdif-3 and sdif-2. I tend more to trust Neve than to trust some full of mistakes paper.
5-2 Word Clock
Duty 50%(±10%) frequency=44.1kHz
Okay so we transmit a wordclock at 1/64 or 1/128 the bit frequency, so we'll need a 64* or 128* times PLL
APPENDIX
As SDIF-3 format DIO interface sends WORD CLOCK and DATA in different BNC cable, there
can be a difference in delay time between them. And also as SDIF-3 DATA is 88.5ns period
high-speed signal, there is a possibility of bit shift of data. Consideration on selection of BNC
cable and connection is needed to avoid this data bit shift.
Again, this is SDIF-2, but with biphase encoded DATA, when it only applies to SDIF-3
This document drives me mad.
It should be on some IEC paper, but I can't find it...
Further inspection into the ESS datasheet showed that it will accomodate for both biphase and normal encoded DSD Data, but will anyway require a bit clock at the DSD Fs.
From the grimm's paper:
3.Overview
This interface is based upon 75ohm BNC, unbalance transmission, 1channel in one cable and
externalwordclock(WCK).Anditsbitrateis5.6448MbPS(fsdsd=2.8224Mbps)or
11.2896Mbps(fsdsd = 5.6448Mbps). Transmission is 1channel unbalance transmission and it
uses word clock as synchronization technique.
BUT
5-1 Modulation Method.
Phase Modulation
Bit rate= 5.6448Mbps when fsdsd is 2.8224MHz.
=11.2896Mbps when fsdsd is 5.6448MHz.
So this document fails to make the difference between sdif-3 and sdif-2. I tend more to trust Neve than to trust some full of mistakes paper.
5-2 Word Clock
Duty 50%(±10%) frequency=44.1kHz
Okay so we transmit a wordclock at 1/64 or 1/128 the bit frequency, so we'll need a 64* or 128* times PLL
APPENDIX
As SDIF-3 format DIO interface sends WORD CLOCK and DATA in different BNC cable, there
can be a difference in delay time between them. And also as SDIF-3 DATA is 88.5ns period
high-speed signal, there is a possibility of bit shift of data. Consideration on selection of BNC
cable and connection is needed to avoid this data bit shift.
Again, this is SDIF-2, but with biphase encoded DATA, when it only applies to SDIF-3
This document drives me mad.
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Just Google sdif 2 and sdif 3; the info is clear. As for ESS, all ypu needs to do is to feed in dsd(R) dsd(L) and clk.
If you want clarity, then try to find the manual for the dCS 954. I do nt have it right now, but it was freely available a couple of years back. Both sdif2 and 4 work if you have the right combination of equipment.
I can find the dCS manual in 3 days or so, but the info in google.co.uk is good.
I have been using the interface for sometime on my dCS setup
The thing that may have confused you is that sdif 2 refers to the two sockets for signals (L and R) and a third socket is for the clock. Alternatively sdif 3 refers to clock being embedded in the signals.
Just feed DSDL DSDR and DSDClk into the Sabre implemented by TW and there are no problems.
I have the pdf but can't break it into pages to send you (long)
Well, It shouldn't work, as is it clearly stated in the papers that the ESS part wants a BIT clock, and the SDIF2 protocols sends a WORD clock at 44.1kHz. So there's need for a PLL.
But maybe it is good...? I don't know! ESS also has 2 seperate DSD modes, one for biphase encoded data, and the other for straight data. But they don't talk about clock recovery!
But maybe it is good...? I don't know! ESS also has 2 seperate DSD modes, one for biphase encoded data, and the other for straight data. But they don't talk about clock recovery!
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