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Old 21st November 2012, 09:54 AM   #581
gwikse is offline gwikse  Norway
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Quote:
Originally Posted by acko View Post
Hi Bunpei,

Thank you very much for your continued support!
I am actually preparing to test the SDTrans384. The Turbo Clock is directly compatible, so minimal mods required. But first I need to get an interface board done that will take the header outputs of the SDTrans and fan out to w.fl coax to match the AKD12 Digital Inputs.

This is almost ready but I have noticed that when physical connections are arranged for DSD from SDTrans, the DAC inputs will not be compatible with I2S (stereo mode). This means I cannot play pcm audio on a DAC setup for DSD and vice versa, unless the digital inputs are physically reconnected to match. The line of contention is LRCK (of I2S) that becomes DSD1 and also the way the DAC cells are connected to the inputs.

Not sure if I am getting confused with all the signal lines but any help is most appreciated.
Not sure if it will tell you anything you dont know but have you had a look at the Hifiduino site?
The Amanero USB board seem to be able to change the outputs to fit the ESS inputs. Not sure how it is done, but the outputs are configured correctly with both DSD and PCM but that is done at the source (amanero board). Edit: that internal switching of the ESS chips will give most people a headache...

Edit2: could the outputs from the source be altered in firmware to output DSD in one manner and PCM in another (based on source material)?
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Last edited by gwikse; 21st November 2012 at 10:19 AM.
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Old 21st November 2012, 10:19 AM   #582
qusp is offline qusp  Australia
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not as simple as that and it wasnt solved with arduino, amanero had to have its firmware modified. amanero simply had left and right channels of DSD switched when wired to PCM standard wiring, the problem here is with the sdtrans board and the way it is wired afaik and no code or function of ESS can fix that.
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Old 21st November 2012, 11:47 AM   #583
deanoUK is offline deanoUK  United Kingdom
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Hi there AR2, great work.
Could you point me to further information on the jfet buffers you are using ?
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Old 21st November 2012, 02:04 PM   #584
Bunpei is offline Bunpei  Japan
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Quote:
Originally Posted by acko View Post
... to match the AKD12 Digital Inputs ...

This is almost ready but I have noticed that when physical connections are arranged for DSD from SDTrans, the DAC inputs will not be compatible with I2S (stereo mode). This means I cannot play pcm audio on a DAC setup for DSD and vice versa, unless the digital inputs are physically reconnected to match. The line of contention is LRCK (of I2S) that becomes DSD1 and also the way the DAC cells are connected to the inputs.
Dear Acko,

I'm not sure about input configuration scheme of AKD12.
The output pin assignments of SDTrans are;
LRCK ... DSD Left
SDAT ... DSD Right
DCLK ... DSD DCLK
(MCLK ... Master Clock Output)
when SW1-1 OFF, SW1-2 ON (Both PCM, DSD are available)

This assignment fits TPA Buffalo II input style well without any physical re-wiring upon switching between DSD and PCM.
"glt" gives us a very clear explanation of the input configuration scheme on his blog page;
Hifiduino Code and Buffalo III DAC H i F i D U I N O

Please remember that register setting for ES9018 to enable input re-mapping is necessary.

Best regards,
Bunpei

Last edited by Bunpei; 21st November 2012 at 02:08 PM.
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Old 21st November 2012, 07:22 PM   #585
acko is offline acko  Australia
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Default DSD

Thank you all.

Yes, that is what I thought, inputs must be either reconnected physically or remapped using the quantizer bits. Setting quantizer bits (reg#15) is not even mentioned in the datasheet, so I was going with the standard connections. For the AKD12 there are no jumpers or switches. Input connections are : DATA1 -DAC1 .... DATA8-DAC8. For stereo I2S, DATA1,2,3 & 4 lines are connected to I2S SDATA line to fill all the 8 DACs and the arrangement of the internal DAC cells nicely takes care of L/R outputs.

For stereo DSD, I was trying to connect DATA1, DATA3, DATA5 and DATA7 to DSD1 output from SDTrans. This will form the RIGHT Channel of the DAC
Then DATA2, DATA4, DATA6 and DATA8 to DSD2 output of SDTrans for LEFT Channel. Again no problem with DSD stereo on its own but you will see that it will jumble up I2S


Will check out GLT's site also, very informative! Thank you GLT
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Old 22nd November 2012, 05:06 AM   #586
acko is offline acko  Australia
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Default Super Trans

Quote:
Originally Posted by hochopeper View Post
Acko, I'm just stirring the pot there mate. I think this will be a VERY interesting design indeed. I am watching with interest as things develop. I am not in a position that allows the financial commitment of a fully tricked out AKD12P design at the moment, so I am just watching mostly, for now.
No problems, just stayed tuned
Just got FIFO-Clock (and freebies) for evaluation from Ian today. Trying to get my head around all the bits now
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Old 22nd November 2012, 05:13 AM   #587
AR2 is offline AR2  United States
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Quote:
Originally Posted by deanoUK View Post
Hi there AR2, great work.
Could you point me to further information on the jfet buffers you are using ?
Thank you deanoUK.

Here is the schematic of buffers I am using. I posted picture and PDF, so it is easier to read for you. Buffer could be stand alone, without trafo, but together it was intended and used as an output stage for voltage out DACs, particularly AK4396. It is an outstanding unit and very versatile. As you could see there are no caps in the line of signal, and any DC coming out of DAC is blocked by Lundahl. Originally it was designed to be 1+1 : 4+4 but that was too much and I am using it as 1 +1 : 2 + 2. That also gives much less distortion.
Here are some shots of populated boards as well as empty ones, and some of many implementations I did in the process of making my DAC. I do not have any more boards, but if you would like to make your own I will be happy to send you gerber files.
Attached Images
File Type: png Screen Shot 2012-11-21 at 8.49.15 PM.png (181.0 KB, 277 views)
File Type: jpg board11890.jpg (736.6 KB, 259 views)
File Type: jpg board11888.jpg (205.5 KB, 253 views)
File Type: jpg DAC-and-other-boards-11768.jpg (782.0 KB, 253 views)
File Type: jpg DAC-and-other-boards-11784.jpg (709.0 KB, 234 views)
Attached Files
File Type: pdf vladsbufferX6_1d with discrpt.pdf (172.4 KB, 40 views)
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Old 22nd November 2012, 02:32 PM   #588
Bunpei is offline Bunpei  Japan
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Quote:
Originally Posted by acko View Post
Yes, that is what I thought, inputs must be either reconnected physically or remapped using the quantizer bits. Setting quantizer bits (reg#15) is not even mentioned in the datasheet, so I was going with the standard connections.
I'm afraid that you have misunderstood the input re-mapping mechanism somehow. I think no quantizer setting on Register #15 is essential. Instead, "Register #14: DAC3/4/7/8 Source" settings are necessary.

Anyway, AKD12 might have a "ESS Evaluation Board" type simple input terminals. In this case, you may need a few bridging before you connect lines to AKD12 input.

To glt, would you give your comments?
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Old 22nd November 2012, 07:22 PM   #589
qusp is offline qusp  Australia
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Quote:
Originally Posted by acko View Post
No problems, just stayed tuned
Just got FIFO-Clock (and freebies) for evaluation from Ian today. Trying to get my head around all the bits now
if you need any help dont hesitate to ask
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Old 22nd November 2012, 08:26 PM   #590
glt is offline glt  United States
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Quote:
Originally Posted by Bunpei View Post
I'm afraid that you have misunderstood the input re-mapping mechanism somehow. I think no quantizer setting on Register #15 is essential. Instead, "Register #14: DAC3/4/7/8 Source" settings are necessary.

Anyway, AKD12 might have a "ESS Evaluation Board" type simple input terminals. In this case, you may need a few bridging before you connect lines to AKD12 input.

To glt, would you give your comments?
I think it will have the same effect. The correct way is to remap with reg14, if using reg15 you will be limited to 8bit and 9bit
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