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Old 22nd January 2012, 02:42 AM   #401
acko is offline acko  Australia
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Default ESS DAC

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Originally Posted by pedefede View Post
Hi all
Anyway, It sound like ESS is still the best DAC around ...
Yes, it also appears ahead of time with sampling rates up to 1.5MHz and DSD support! Transports with 768KHz are only just appearing, so quite a lot of catching up to do.
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Old 22nd January 2012, 03:26 AM   #402
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Default Synchronous Master Clock

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Originally Posted by wktk_smile View Post
Can I get some more informations about Synchronous Master Clock AKX Series? how to switch 44.1k / 48k, buffered or not, etc...
Ok, this is not a new concept but a DAC system with its master clock synchronized with the source/transport clock has better jitter performance than one that is independently clocked (async) The Sabre DACs ( with all its jitter reduction technology) also benefit from such arrangement of synchronous clocking. A-B comparison showed improved detailed when synchronously clocked. Others have similarly reported such benefits.

The simplest implementation is to slave the DAC clock from the transport clock (usually 11-24MHz). In this case transport is the Master. Works fine with low sampling rates ( up to 96-176Khz) but the Sabre DACs require higher clock frequency than the transport clock at higher sampling rates for best results (jitter reduction).

For 384KHz or higher sampling rate we are looking at ~100MHz DAC master clock. So use a 98.304MHz for the DAC clock that is an integral multiple of a typical transport clock and then divide this output by 4 to match the 24.576MHz of the transport XO. After this slave the transport with this divided but perfectly edge-synchronized clock. (So DAC clock is Master)

Things can get complicated though with most transports having 2 or even 3 clocks to cover the full range of sampling rates. So the multiple switching needs to be implemented in a design like the AKX Clock module.

Hope this helps.
More updates to come.
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Old 23rd January 2012, 01:04 PM   #403
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Quote:
Originally Posted by acko View Post
Things can get complicated though with most transports having 2 or even 3 clocks to cover the full range of sampling rates. So the multiple switching needs to be implemented in a design like the AKX Clock module.

Hope this helps.
More updates to come.
several well-known low-phase noise oscillators - such as Crystek CCHD-957 - has a pin for enable/disable function, and several transports/USB DDC uses this
function for switching clocks if they has 2 clocks for 44.1k fs and 48k fs family.

For example, SDtrans384(sd card digital transport) has output pins for
enable/disable signal in order to control switching when using external 22.5792mhz/24.576mhz clocks.

So that I think it might be helpful for switching 2 or more if AKX clock module could accept such E/D signal.

Of course, tapping these enable/disable signal from transports might be not so
easy.

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Old 23rd January 2012, 08:14 PM   #404
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Default Synchronous Master Clock

The AKX has input switching functions that can take signals from transports and select XOs that has enable/disable functions. The CCHD-957 is a good candidate for these functions but has only up to 50MHz types. I would like to cover up to 100MHz with similar super low phase noise specs. NDK's XO is an option but getting sample quantities for DIY folks can be a problem. Looking for 98.304MHz and 90.3168MHz. Anyone can help source samples? .
Also transports without the above outputs can be a problem and may require mods to tap signals from processor chips or even use the DAC controller (like AKC12) to monitor sample rates and switch the AKX
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Old 24th January 2012, 03:07 AM   #405
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Default AKX701

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Old 24th January 2012, 03:16 AM   #406
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can the MCU be used for this function with only a firmware upgrade? would it be able to use its usb connection to sense these changes? titan is able to send these cues

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• When in slave mode, outside clock generator (or DAC/ADC module) must change the frequency accord- ing to the signal of “CLK_SEL” . CLK_SEL will set LOW when Master clock input needs to be 44.1K* 512 or 44.1K * 1024 Hz. It will set HIGH when Master clock input needs to be 48K* 512 or 48K * 1024 Hz
so looks like i'm covered, i can already use titan for master, but clock distribution is causing me some problems

you can get sample quantities of the NDK at ch1pstop.com but they need several weeks to fulfil the order. at least thats how i understand it

Last edited by qusp; 24th January 2012 at 03:18 AM.
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Old 24th January 2012, 09:24 AM   #407
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Default Sync Clock

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Originally Posted by qusp View Post
can the MCU be used for this function with only a firmware upgrade? would it be able to use its usb connection to sense these changes? titan is able to send these cues
I have not checked this Lightharmonic Titan module as it appears is not available for DIY use. Will look into it and advise soon.

The following Transports can be supported (mods and required):
1. AKU24 (Hiface)
2. EXA2UI
3. USBPAL
4. SDTrans384

Thanks, will check Ch1pstop for NDK XO samples.
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Old 24th January 2012, 09:56 AM   #408
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the quote was from the manual, so if a pullup logic low or high can be used to trigger a switch between clocks on the new module it would seem possible to use.

i can test if it works, or perhaps take a peek at the voltages present on the CLK_SEL pin when a change in sample rate is required. i dont see why it wouldnt, one presumes thats why the CLK_SEL pin was put there in the first place

if you are making an order for the NDK units, can you please count me in for a couple? i'll split shipping

Last edited by qusp; 24th January 2012 at 09:58 AM.
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Old 24th January 2012, 10:11 AM   #409
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Quote:
Originally Posted by acko View Post
The AKX has input switching functions that can take signals from transports and select XOs that has enable/disable functions.
Nice!
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Old 24th January 2012, 10:48 AM   #410
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That AKX sounds pretty handy!

I had a question about the upcoming AKD16. Is it a similar setup to the AKD18 but without the need for external IV stage? Will it be capable of handling similar multichannel i2s inputs? Is the IV on the pcb or integrated into the ES9016 chip? I'm looking to take i2s signal from a minidsp and trying to keep system complexity down a bit so integrated IV appeals to me. I will need 6ch for a 3way active setup.
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