i2s clock/data distribution

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You might want to consider using LVDS format transmitter and receiver chips if you really need to go 15cm or more, otherwise shorten things up as much as possible and use the I2S directly.. I had cross-talk and interference problems at distances over 10cm in my last dac project.

jmtcw... ymmv etc..
 
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kevinkr said:
You might want to consider using LVDS format transmitter and receiver chips if you really need to go 15cm or more, otherwise shorten things up as much as possible and use the I2S directly.. I had cross-talk and interference problems at distances over 10cm in my last dac project.

jmtcw... ymmv etc..

Through my multiple DAC modules, I2S distributes over a length of 60cm without any problems. I do not use drivers. I do use input buffers at every module though....

sounds terrific, the length seems to have no negative impact and the gain in adding more DACs does have a very positive (balance?) impact
 
Thanks for the replies

The board is not realy high performance but i want to be sure that i do not run in to signal integrity issues.

I have designed a 3 channel DA board with an SPDIF to I2S converter on it as well (AD1854 and CS1820).
The 2nd board will either be a dedicated DSP of FPGA for signal processing.
This setup enables me to experiment a little.

I checked the HC/HCT series buffers but thought these were quite slow. The NC7NZ34 is exactly what is was looking for !

grtz

Simon
 
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