ESS Sabre Reference DAC (8-channel)

no propagating going on here Brian, I only reported that this unsubstantiated info was what was all over the forum, I said nothing of it being for real. in fact I have registered my complaint and skepticism and said exactly what you said above, that until its confirmed by official channels as far as i'm concerned nothing has changed.

I just sent off another email, but

ESS is notorious about not returning email. It is much more effective to call.
indeed hehe, usually I get a reply, but it takes a while. my stuff has taken a bit of a back seat to selling the house, moving and other business until recently, so i'll probably give them another call soon. have they got skype? obviously dont post here.
 
But people should not think that the only reason a certain source will not lock at the lowest DPLL BW is jitter. There are other problems that can cause this too.

I greatly appreciated a compact answer from Russ.

My understanding is that;
1. Primary source for DPLL functionality in the case of I2S is not Bit Clock but Word Clock. Therefore, quality of Word Clock more affects the DPLL bandwidth setting than that of Bit Clock.
2. ES9018 regards a time interval given by its system clock tick as non-jitter standard.
3. ES9018 must have an internal independent oscillator that can tell an absolute frequency of the system clock externally connected.
4. In the context of DPLL or resampling time interval accuracy, a higher system clock frequency for ES9018 might bring better results.

Does anyone have different understandings?
 
I greatly appreciated a compact answer from Russ.

My understanding is that;
1. Primary source for DPLL functionality in the case of I2S is not Bit Clock but Word Clock. Therefore, quality of Word Clock more affects the DPLL bandwidth setting than that of Bit Clock.
2. ES9018 regards a time interval given by its system clock tick as non-jitter standard.
3. ES9018 must have an internal independent oscillator that can tell an absolute frequency of the system clock externally connected.
4. In the context of DPLL or resampling time interval accuracy, a higher system clock frequency for ES9018 might bring better results.

Does anyone have different understandings?

1) This is conjecture, but I would like to know why you think so. In PCM everything really is driven by the bit clock. But I can see both word and bit clocks coming into play.

2) This seems obvious. Its clock is the *master* clock.

3) Not that I know of. Here is why. You have to know the master frequency in order to calculate certain values. If the chip already knew that would not be necessary. My understanding is that the chip works more like a state machine. Everything is relative. I am parsing my words here so as not to violate the NDA.

4) This I am quite sure is true, up to the limit.

If you get a complete answer to these questions from ESS I will be very happy. :)
 
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1. Primary source for DPLL functionality in the case of I2S is not Bit Clock but Word Clock. Therefore, quality of Word Clock more affects the DPLL bandwidth setting than that of Bit Clock.

For I2S modes it uses the bit clock into the DPLL. The word clock is not used.

2. ES9018 regards a time interval given by its system clock tick as non-jitter standard.

Yep. It assumes that the XIN master clock is the refference. It can only be as good as this clock.


3. ES9018 must have an internal independent oscillator that can tell an absolute frequency of the system clock externally connected.

No internal oscillator. It uses the XIN and the bit clock for all calculations.

4. In the context of DPLL or resampling time interval accuracy, a higher system clock frequency for ES9018 might bring better results.

Not all the time. The real benefit is in getting the best timing accurate clock, the frequency is not too important once you meet the minimum spec. Faster "can" be better, but its the complete system that needs to be looked at as a whole.



Does anyone have different understandings?
 
so we are all very happy :D especially given my upcoming experiments with the rubidium clock. I will be very interested to see how longer term stability effects the audio if at all, but also this will make experiments with master clock X1 power supply quality more easy to evaluate
 
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Datasheets for Sabre type of DACs no longer require NDA

Hi All,
I'd just like to confirm that I have received data sheets for all Sabre DAC products from Shaw Electronics by just asking for them in a polite email, less than 10 hour delay, VERY good service.

So it doesn't seem like there are any restrictions on publishing schematics or anything else regarding designs using these products.
 
indeed, I received an answer to my question, ESS901X datasheet nolonger needs an NDA, but they simply take note of the people they supply the datasheet to, so while the datasheet itself should still not be published on a public forum, no reason for schematics using the designs not to be.
 
so we are all very happy :D especially given my upcoming experiments with the rubidium clock. I will be very interested to see how longer term stability effects the audio if at all, but also this will make experiments with master clock X1 power supply quality more easy to evaluate

BTW this is not a skeptical post, I just meant that rubidium clocks are best known for long term stability, rather than short term, but the clock Bunpei has kindly sent my way has the benefit if both along with more easily tweakable power supply
 
What wonderful replies!

Dear Russ and Dastine,

I'm very happy to have precise understandings on ES9018 chip owing to your answers.

I recently tested NDK 9325D, 100MHz OCXO oscillator, of an ultra low phase noise profile for XI Master Clock source of ES9018 and got a good result.
I think I have obtained a good theoretical basis for the result.

Though the oscillator outputs +- 1.6 V p-p sine wave, I could use it as an input for ES9018 by giving an +1.6 V bias with batteries based on Dastine's advice.
"gusp" will conduct his testing using the same oscillator module. I hope he will also get his own good result.

Bunpei
 
Excellent news on the datasheet NDA requirement lift! Now I guess I can finally start publishing source code and such. :)

Does this mean that those of us who signed NDAs are no longer bound by them? It would be nice to be told this by ESS.

I am also extremely glad to be working with Crystek to get the superb clock that we use. But we always knew how critical the clock was, and that is why we paid particular attention there.
 
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haha yeah roll on with the source code. to make sure there is no misunderstandings, I heard back from Shaw today who I also asked, not ESS directly. I also wonder about where that leaves people who are in an agreement, so was going to ask that question myself, so there can be no misunderstandings. I would have thought that it would be a good idea to tell OEMs about this rather game changing detail as well. i'm surprised dustin didnt say anything before, although he kind of did by giving the amount of direct info he did and I dont blame him for just wanting to leave it to the lawyers
 
Russ, does the lifting of whatever 'ban' ESS has imposed on the world mean that they will actually publish a useful datasheet for the device? For the life of me, I do not understand why companies think they have a competitive edge by NOT telling people the specs of their products and how to apply them.
 
Russ, does the lifting of whatever 'ban' ESS has imposed on the world mean that they will actually publish a useful datasheet for the device? For the life of me, I do not understand why companies think they have a competitive edge by NOT telling people the specs of their products and how to apply them.

That is just it, I don't have that straight from ESS yet.

I also don't get why the DS is not public like TI's or Wolfson's. It has always been a mystery to me.
 
yeah I think this datasheet after all this build up is going to be somewhat of a letdown to some people :D because I also cannot see what detail it is that they are so keen on keeping out of the public eye. its not even that comprehensive, better than some, but less detailed than many I have seen also. people waiting for an explicit application note will be disappointed, though some areas are covered very thoroughly like registers
 
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Excellent news on the datasheet NDA requirement lift! Now I guess I can finally start publishing source code and such. :)

Does this mean that those of us who signed NDAs are no longer bound by them? It would be nice to be told this by ESS.

I am also extremely glad to be working with Crystek to get the superb clock that we use. But we always knew how critical the clock was, and that is why we paid particular attention there.


Hi Russ,

There was never any restriction on your schematics from the NDA. You can publsish them at will if you wish to do so.

Dustin
 
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