ESS Sabre Reference DAC (8-channel)

hard task mixing all that down and maintaining the layering, pity you are running intel, otherwise I could sort you out with waves platinum, which contains some very high quality 64bit mixing console channel strip models and reverb tails.

I mentioned the effect of flattening as I know it first hand, it takes many years to get that down properly and I dont always get there thats for sure. what control surface are you using for automation control? I have my eye on a new novation controller and just put down the first payment on a used Access virus TI
 
fair enough, i'll have some interesting reports in the coming weeks as my teflon ackodac board will be delivered this coming week. wondering when someone will order the new 8 channel output ES9018 ackodac, combined with the MCU this will make a very nice multichannel HT dac
 
... I am only convinced of hearing full resolution when playing music within the Logic program and using the onboard DAC.

Dear Frank,

I appreciated your reply very much. I can understand very well that editing of 24 bit sounds requires a 32 bit floating point arithmetic essentially.

What I wanted to know is how your onboard DAC is like and with what mechanism the DAC plays the 32 bit data on your Mac in a 32 bit manner. I think it's a very valuable comment that a 24 bit sound is flatter than its original 32 bit data. I wanted to know conditions where the result was obtained.

Best regards,
Bunpei
 
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Joined 2007
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Greetings Bunpei,

Sorry, I do not know anything specific about the conversion between Apple's OS X Core Audio floating point format (up to 64 bits) and the integer format needed by the DAC. Surely, the goal of obtaining clean 32 bit PCM for the ES9018 is worth exploring. Perhaps the following sources can help you find the answer to your question about the OS X architecture.

http://developer.apple.com/audio/pdf/coreaudio.pdf
Search Page Search: core audio
Mac OS X Audio • Index page
 
Meaning of DPLL Bandwidth Parameter

Does anyone kindly give me an brief quantitative explanation of effect of changing DPLL Bandwidth parameter setting on ES9018 in the case of I2S input without violating NDA with ESS?

In Japan, a recent DAC product, Fidelix CAPRICE adopts dip switches that enable DPLL setting adjustment by user. Such an expression that "Oh, A S/PDIF signal of my transport achieves a stable lock with 'the lowest' setting" has become popular among posts on some Japanese BBSs or blogs.

Qualitatively, I understand "With the lower bandwidth setting our transport locks, the less jitter the S/PDIF signal has". My first question is what "the best default" means? Does it mean an "adaptive automatic control" of the parameter or just a certain fixed parameter? Though I browsed the US Patent for "a jitter eliminator logic", I could not find any meaning of the DPLL parameter.
As long as a lock state is maintained, does the lower bandwidth setting always bring a better sonic result?
 
Does anyone kindly give me an brief quantitative explanation of effect of changing DPLL Bandwidth parameter setting on ES9018 in the case of I2S input without violating NDA with ESS?

In Japan, a recent DAC product, Fidelix CAPRICE adopts dip switches that enable DPLL setting adjustment by user. Such an expression that "Oh, A S/PDIF signal of my transport achieves a stable lock with 'the lowest' setting" has become popular among posts on some Japanese BBSs or blogs.

Qualitatively, I understand "With the lower bandwidth setting our transport locks, the less jitter the S/PDIF signal has". My first question is what "the best default" means? Does it mean an "adaptive automatic control" of the parameter or just a certain fixed parameter? Though I browsed the US Patent for "a jitter eliminator logic", I could not find any meaning of the DPLL parameter.
As long as a lock state is maintained, does the lower bandwidth setting always bring a better sonic result?

I too am interested in knowing more about the dpll feature. Perhaps Dustin can share a bit more.

I recently pulled both the spdif and I2S interfaces of a Musiland device. The spdif locks with "lowest" and the I2S locks at "low-medium" which is up two notches from "lowest". Both outputs are from the same Spartan fpga and there is only one clock (derived by a cheapo crystal) in the whole system. The two on-board DCMs of the Spartan FPGA are already used deriving the sample rate frequency. Other frequencies I suppose goes through standard frequency multiplication.

For the I2S at the lowest dpll setting, it locks but there will be drop-outs (a few ~ tens per song) lasting a fraction of a second until the dpll locks again.

Since the DPLL resides in the jitter eliminator, what do the different dplll settings do to the ASRC, and how much jitter is eliminated with respect to the different dpll settings?
 
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All reports from whom? Nobody who deals with ESS would ever tell you such nonsense.

Two things, that link is not legitimate, and the datasheet was not obtained by legal means. Second it is the first revision of the datasheet which has some pretty key errors.

Way to kill off ESS good will though FAA.

Before he edited it the post said this:
Just found this link on google, thought that someone would be interested: LinkBucks.com - Get your share!

Try stripping off the PDF name from the URL.
 
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All reports from whom? Nobody who deals with ESS would ever tell you such nonsense.

Two things, that link is not legitimate, and the datasheet was not obtained by legal means. Second it is the first revision of the datasheet which has some pretty key errors.

Way to kill off ESS good will though FAA.

Before he edited it the post said this:


Try stripping off the PDF name from the URL.

yes Russ, that is why I never give away, even though I am asked on a regular basis. there are posts all over this forum saying that the NDA isnt required anymore, but until they confirm this, i'm sticking to mine. I have asked them to confirm this one way or the other a couple of weeks ago, but have not received a reply on it yet
 
I havent tried calling them, I have no desire to make an international call just to find out something for others benefit. if they wish to call, they can; I only mentioned in an email. I have no need to contact them on a regular basis, for the moment I have all the info I need for working on my own stuff; which is not a big deal.