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Old 7th March 2008, 10:24 AM   #311
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Quote:
Originally posted by rossl


That's really cool, Len. I will be happy when you will be able to measure a difference between the 20 cent, two buck, 20 buck, and $100 VCXOs. It will take an significant investment in circuit board design to make a test measurment that I will believe.

The real test is about the hearing of a difference between any or all of the above. Some of you guys make too, too much out of the specification game.

Of course, if money is no object in oscillators for our DACs, we can order an atomic clock from the National Bureau of Standards. < / sarcasm>

Ha ha that raised a smile!, I can just see some tweaker out there with an oscillator the size of a fridge connected to this teeny weeny little DAC chip!

I think that when it comes to clocks, surely everyone will agree that the less jitter / phase noise, the better. Like you say, the question is whether you can hear any differences between product 'A' and product 'B'. All I'm suggesting here is finding out the point of diminishing returns beyond which you get no useful improvement in sound quality. If this part turns out to be more immune to jitter than competing DACs, then maybe a two buck oscillator can will be enough.

I'm going to start a new thread for my oscillator measurements, this is getting too off topic.

Now back to my schematics. (I'm designing a CD player upgrade using this part - a plug-in module)

cheers,

Len.
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Old 7th March 2008, 12:45 PM   #312
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Quote:
Originally posted by len_scanlan



Ha ha that raised a smile!, I can just see some tweaker out there with an oscillator the size of a fridge connected to this teeny weeny little DAC chip!

I think that when it comes to clocks, surely everyone will agree that the less jitter / phase noise, the better. Like you say, the question is whether you can hear any differences between product 'A' and product 'B'. All I'm suggesting here is finding out the point of diminishing returns beyond which you get no useful improvement in sound quality. If this part turns out to be more immune to jitter than competing DACs, then maybe a two buck oscillator can will be enough.

Len.
It would depend on the jitter rejection characteristics of the SRC.

Dustin - is it possible for you to give any information WRT jitter
rejection corner freq and rate (slope) of attenuation.
As you are probably aware, AD1896 etc have this info on the data
sheet.

cheers

Terry
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Old 7th March 2008, 02:03 PM   #313
rossl is offline rossl  United States
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Quote:
Originally posted by len_scanlan

Now back to my schematics. (I'm designing a CD player upgrade using this part - a plug-in module)

cheers,

Len.
That sounds like a worthwhile project, Len.

There is another thread here about upgrading the analog output of the Behringer DEQ2496. It occurred to me that it would be a good candidate for a Sabre8 drop in board to replace the AKM DAC and the low-grade op-amps.

The add-in board would take the SPDIF out of the DSP equalizer.

This is something most DIY people could do easily. Here we have a box with the appropriate digital inputs jacks, analog output connectors and power supply.

The Behringer SRC2496 is also a good candidate. It has three digital inputs that are switched before going to the CS8420 resampler chip. The SPDIF could be picked off just before it gets to that horrid old Cirrus Logic chip and it's pitiful noisy clock.

The SRC2496 also has a low grade analog output section that could be replaced with a decent design.

Both of the two Behringer boxes have room inside the case for add-in boards.

I'm sure there is enough power supply current available for the digital parts of the board. We would have to analyze the op-amp supplies to see if there is enough current there. I suppose there would be if we disconnected the juice to the existing op-amps.

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Old 8th March 2008, 08:05 AM   #314
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Quote:
Originally posted by len_scanlan
finding out the point of diminishing returns beyond which you get no useful improvement in sound quality
Well, the question becomes how you can define "useful improvement in sound quality". If you mean indistinguishable in blind testing, there's always the question whether a difference might not be audible when other parts of the signal chain are improved--most notably speakers/headphones, which even in their modern incarnations have high distortion.
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Old 8th March 2008, 02:45 PM   #315
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Quote:
Originally posted by abzug

Well, the question becomes how you can define "useful improvement in sound quality". If you mean indistinguishable in blind testing, there's always the question whether a difference might not be audible when other parts of the signal chain are improved--most notably speakers/headphones, which even in their modern incarnations have high distortion.
In the context of my own work, useful improvement means I feel its worth spending the extra money on a more expensive component - I'm working on my own project, so my own ears are the final judge and jury. If I'm happy with the sound, thats good enough for me!

cheers,

Len.
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Old 8th March 2008, 02:49 PM   #316
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Hello Dustin,

You mentioned earlier that THD is better in current output mode ... how much does performance deteriorate in if used as voltage output?

Dan
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Old 8th March 2008, 03:37 PM   #317
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Quote:
Originally posted by Spartacus
Hello Dustin,

You mentioned earlier that THD is better in current output mode ... how much does performance deteriorate in if used as voltage output?

Dan
It's all in data sheet, -108 vs -118.

T
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Old 8th March 2008, 04:41 PM   #318
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OK got it. Thanks Terry.
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Old 10th March 2008, 08:55 PM   #319
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Default Re: SuperDAC

Quote:
Originally posted by FuriousD
Dustin can you save me some time here and post the answer here please? Does the Sabre DAC use an internal PLL and buffer to reclock the data? does the DAC at the output clock the data out using this PLL clock or does it use the input master clock?
[/B]

There is no analog PLL inside the chip, The data simply comes into the chip at the bitclock rate, then there is a circuit that takes the date into the XI clock domian and makes sure that jitter is not introduced.
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Old 10th March 2008, 09:06 PM   #320
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Quote:
Originally posted by Terry Demol


It would depend on the jitter rejection characteristics of the SRC.

Dustin - is it possible for you to give any information WRT jitter
rejection corner freq and rate (slope) of attenuation.
As you are probably aware, AD1896 etc have this info on the data
sheet.

cheers

Terry


The corner frequency is around 0.1Hz or so.

Thnaks

Dustin
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