ESS Sabre Reference DAC (8-channel)

[RayCtech]

Originally Posted by Bunpei

You must have added five more 470 uF OS-CONs to the prototype version you have shown us before and located the board near to your DAC chip.

Hi Bunpei,

That was a small part of an really old and now obsolete setup
Actually it was only the main PSUs (pre-regulators) for an USB adapter, I2S isolator and the LVDS (I2S) transmitter boards

The current (soon yet another revision to be finished) DAC board alone there are 30 pcs of the 470uF OS-CONs..
Even this version are over a year old design and I think it stretched the ES9018 to the absolute technological limits as it implemented the 9bit true mode...

As soon as that project are ended I will finish my newest creation:
A DAC that supports DSD up to and including DSD2048 and PCM up to and including 3072k/32bit. Runs in NOS mode or modes with up sampling up to 256x.

[AndriyOL]

Originally Posted by RayCtech

As soon as that project are ended I will finish my newest creation:
A DAC that supports DSD up to and including DSD2048 and PCM up to and including 3072k/32bit. Runs in NOS mode or modes with up sampling up to 256x.

What DAC chip supports that?

[Coris]

Originally Posted by RayCtech

As soon as that project are ended I will finish my newest creation:
A DAC that supports DSD up to and including DSD2048 and PCM up to and including 3072k/32bit. Runs in NOS mode or modes with up sampling up to 256x.

Could be nice to see some of your creations... If not as schematics, maybe as pictures at last.

[glt]

I know RayTech is a very capable engineer, but that sounds like he is kidding :-)

[Nikola Krivorov]

Originally Posted by glt

I know RayTech is a very capable engineer, but that sounds like he is kidding :-)

He is not...

[Coris]

RayCtech it seems to be the first one ever who come with such figures as in the post above.
It will be really very interesting for all of us, and for sure the best contribution ever in this forum, if he will accept to come out with some details to make us understand, how is possible (what technology is based) to realize such performances.

Else, I just ordered 2 caps 0,4F/0,04ohm to start my experiments using those on ESS9018. Quite excited about this idea...

[Bunpei]

Originally Posted by Coris

... it seems to be the first one ever who come with such figures as in the post above. ...

He wrote his "dRaydream" for the first time here on Amanero thread.

USB to I2S 384Khz - DSD Converter

After three months he seems not to be at the phase of publishing his achievements on his own web site.

[RayCtech]

Originally Posted by Bunpei

He wrote his "dRaydream" for the first time here on Amanero thread.

USB to I2S 384Khz - DSD Converter

After three months he seems not to be at the phase of publishing his achievements on his own web site.

If I should publish every small detail I had to hire a publisher
And the web site was actually terminated sometime last year due to it had not been updated in close to 5 years, and even the AMTs had not been mentioned there

As we "speak" am I listening to native DSD in standard mode (DSD supported up to DSD2048 speed)
I am today debugging a completely new implementation of the USB 2.0 / 3.0 isolation with the OEM Amanero USB adapter and are also debugging the mute output function (timing) of this adapter...
I must add that the improvements in fidelity are remarkable when playing DSD with USB isolation

[RayCtech]

Originally Posted by glt

I know RayCtech is a very capable engineer, but that sounds like he is kidding :-)

12288kHz/32bit was the capability in the initial (PECL) hardware design (and may even possibly still work), but a bit clock at 786.432MHz was a bit overkill. 3072kHz/32bit are realized by splitting data to two data streams - R and L at 32FS clocking - and a bit clock at 98.304MHz. Also 6144kHz/16bit and 12288kHz/8bit can be supported in dual mono 16FS and 8FS mode as the bit clock would still be 90.3168/98.304MHz.
However word clock support up to 12288kHz was kept and a enhanced DSD mode using the whole 32bit data path width can be clocked in by feeding the DSD bit clock to the word clock input. Then DSD64 and DSD128 can be oversampled to DSD256 etc. etc..

[KlipschKid]

Originally Posted by Coris

Else, I just ordered 2 caps 0,4F/0,04ohm to start my experiments using those on ESS9018. Quite excited about this idea...

Please post a video on Youtube of your psu as you switch on. ;-)