ESS Sabre Reference DAC (8-channel)

[KlipschKid]

Hello again,

I just hooked up the wm8805 and tried the 125Mhz clock. The crackle has almost completely gone. It is just barely noticeable in the background when the ES9018 is locked and auto-mute, and then there's a moment of quiet "fzz" when the auto-mute switches off and the music starts.

So I think you are right - cabling, layout etc is very important to eliminate the crackle, just as much as the I2S source is.

I also agree that this clock frequency sounds very good, especially, the high-end treble detail is excellent, but for me, unless I can improve routing etc, the "fzz" will be too annoying.

cheers

[glt]

Also depends on the chip itself (different chips behave differently when used beyond specification due to variations in the manufacturing process)

[qusp]

you guys are really confused at why this might be happening? weve had the subjective 'its better because it sounds better and nothing is wrong with my setup because its not blowing smoke' but as yet we have zero possible technical reasoning why it could perform better running out of spec. its these exact reasons why I warned about using these parts at these speeds.

probably the DPLL just has no idea what to do running at these speeds

glt is right too of course, there will be some variation from Die to Die as to at which point over-spec it starts to Die...

[Coris]

"Nobody" die so far... Only somebody is scare of it sometimes...

[qusp]

Originally Posted by Coris

"Nobody" die so far... Only somebody is scare of it sometimes...

sorry Coris, I just fail to see anything you are doing here as in anyway engineered, or with any kind of design goals, just play with it till it starts to malfunction, for no fathomable reason... its bizarre

[Coris]

Originally Posted by qusp

you guys are really confused at why this might be happening? weve had the subjective 'its better because it sounds better and nothing is wrong with my setup because its not blowing smoke' but as yet we have zero possible technical reasoning why it could perform better running out of spec. its these exact reasons why I warned about using these parts at these speeds.

probably the DPLL just has no idea what to do running at these speeds

glt is right too of course, there will be some variation from Die to Die as to at which point over-spec it starts to Die...

Do you think that this DAC chip sounds better with an DPLL witch "just has no idea what to do running at these speeds", it use 25% more current when clocked with 125Mhz, or get so warm to smoke out in an setup witch is running for month?
Sorry, but such assertions as yours above it sounds only stupid...

Sorry again, but I can hardly see your real contribution here in this forum... The only I can read in your post are critics and negations to everything and everybody. I understand you wish to show that only you know best, but I fail to see how you share that your knowledge in this forum... It is an enough bizarre contribution form a such high qualified engineer...

[RollE2k]

Originally Posted by Bunpei

I believe many of DIY ES9018 users have experienced a positive effect of "synchronous master clocking" scheme on resultant sound quality. I use the term, "synchronous master clocking" as "providing a master clock which is synchronous to BCLK of I2S or DSDCLK of DSD, of which frequencies are x 256, x 512, x 1024, x 2048 of fs.

I must ask, can the ES9018 run synchronous in x2048fs? i thought max was x1024fs
Why i ask, is because then wouldn't it be possible to run 44.1/48kHz files with 90.3168/98.304M clocks?

[qusp]

there is no such thing as 'sync mode', we can only provide it with conditions that the clocks are in sync with (a multiple of) FS, so the DPLL is practically inactive. not sure where you got max 1024x FS being max from. the number 1024 returns no results in datasheet search. you are probably thinking of the fifo

'sync mode' is the new 'current mode'

Originally Posted by RollE2k

Why i ask, is because then wouldn't it be possible to run 44.1/48kHz files with 90.3168/98.304M clocks?

it IS possible to run 44.1/48 with 90.3168/98.304

think about it, the buffalo and ackodac both have used 100MHz as stock clocks in the past. I repeat, there is no 'sync mode'

[Bunpei]

More than fifty ES9018-based DIY DAC users in Japan are enjoying a stable lock at "lowest" by applying synchronous MCLKs of 90.3168/98.304 MHz for 44.1/48 kHz I2S sources.

[gentlevoice]

Hi,

So I think you are right - cabling, layout etc is very important to eliminate the crackle, just as much as the I2S source is.

Just a short comment @KlipschKid etc.: Henry Ott (in Electromagnetic Compatibility Engineering) recommends placing & routing the clock as the first thing to do and keep the wires/tracks from the clock to the circuitry as short as possible. He puts it quite literal in writing "get paranoid about clocks"

Best regards,

Jesper