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Old 29th December 2012, 03:04 PM   #1971
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Quote:
Originally Posted by RayCtech View Post
I have for some time fiddled with a dual mono ES9018 with synchronous clocking at 22.5792MHz and 24.567MHz...

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Preferred device: USB 2.0 A r0.3 Model UID:USB 2.0 A r0.3 UID:AppleUSBAudioEngine:Oblivion:USB 2.0 A r0.3
The USB -> I2S adapter uses the Amanero OEM chipset with custom settings and have both galvanic USB 2.0 isolation and galvanic isolation of I2S and clocks between USB -> I2S adapter and the DAC. The USB -> I2S power supply, DAC power supply and I2S source power supply are galvanic isolated.

The galvanic USB 2.0 isolation gives the primary "Audio Quality" improvements followed by the power supply upgrades of the USB adapter and the DAC.
The galvanic isolation of I2S may influence some measurements, but if it improves or degrades the "Audio Quality" are hard to tell in this setup...
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Old 30th December 2012, 06:11 AM   #1972
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what is your USB 2.0 isolation device? how much bandwidth does it have (what maximum bit depth and sample rate can it handle) and if it is transparent to the computer ? (i mean with this that for example with the ADuM IC several USB-I2S boards are not recognised by their drivers anymore);
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Old 30th December 2012, 08:52 AM   #1973
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Originally Posted by luxury54 View Post
what is your USB 2.0 isolation device? how much bandwidth does it have (what maximum bit depth and sample rate can it handle) and if it is transparent to the computer ? (i mean with this that for example with the ADuM IC several USB-I2S boards are not recognised by their drivers anymore);
It is a proprietary device that also would handle both the SuperSpeed (Tx/Rx pair - USB 3.0), High Speed (D+/D- pair - USB 2.0), FullSpeed and LowSpeed USB.

The main "trouble" with HighSpeed USB 2.0 are mostly that USB 2.0 uses a much lower signal voltage swing -> SuperSpeed, FullSpeed and LowSpeed uses a much higher signal voltage swing..

HighSpeed USB 2.0 (low signal voltage swing) requires the USB adapter to first connect in FullSpeed (high voltage swing) mode before it can switch to HighSpeed mode (low signal voltage swing)..

There is also used a simple method of connecting one resistor to either +5 volt or ground from the D+/D- pair to signal / determine the USB speed and then a signal "quirp" in FullSpeed mode to establish / switch to High Speed mode..

The above descriptions are very simplified, but may reveal why there not are any commercial normally priced isolators available yet - except from the expensive solutions with optical cables and hardware in both ends to support / implement the needed "translations".

My proprietary solution have bandwidth to support USB 3.0, but currently requires integration with a USB adapter to simplify the control logic. The Amanero USB 2.0 chip set firmware have included functions used by the isolation circuit and are the only supported USB adapter for now. Then the isolation circuit also get informations like when the OS apps are connecting and disconnecting (using the USB adapter) and enumerating info etc..

The isolation circuits are a bit more complex than a mere isolation circuit would need.
There are implemented multiple USB inputs that are galvanic isolated from each other and upgrades of firmware of both the USB adapter and the main MCU unit of the DAC are supported, and when playing from other sources like I2S or SPDIF all USB connections are completely disconnected etc..


As a very simplified and not fully technically correct overview:
USB 3.0 SuperSpeed, PCI Express Gen III and SATA III uses compatible signal levels and can use identical hardware for switching and isolation.
USB 2.0 High Speed uses a balanced "LVDS" signal level style..
USB FullSpeed and LowSpeed uses a balanced "TTL" signal level style...

Because of this I have also implemented galvanic isolation of SATA in my ARM based Linux MPD music server.

Last edited by RayCtech; 30th December 2012 at 09:13 AM.
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Old 30th December 2012, 06:23 PM   #1974
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For 350 USD one can get a USB 3 and 2 optical isolation

"The Adnaco-S3B is a remote standard USB 3.0 host controller which can operate at distances up to 100 m and more (depending on transceivers and cable) from the location of your computer. Powered by Adnaco PCIe over-fiber-optic technology, the S3B was designed to suit many applications with the USB host interface. The S3B provides 2 USB Root Hub Ports compliant with the USB 3.0 specification. All USB ports can handle the following interfaces: SuperSpeed (5.0 Gb/s), Hi-Speed (480 Mbps), Full-Speed (12 Mbps), Low-Speed (1.5 Mbps). The S3B is connected to a host computer, equipped with the Adnaco-H1A card and a fiber optic cable. Super-Speed USB is backward compatible with USB 2.0 devices and capable of operating with USB 2.0 platforms. The S3B works with all USB systems and peripherals and does not required any additional software."
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Old 31st December 2012, 08:04 AM   #1975
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Originally Posted by qusp View Post
I remain unconvinced about the 125MHz SAW, running the dac chip 25% over max speed spec for.....? its still async
Why you do not try it by yourself first, to have your own objective conclusions...?
It works very well, and (in my setup) it sounds better than with that "max speed spec for..." ESS9018.
Nice if you can comment this aspect after you have been used yourself such overclocking for this DAC chip...

Last edited by Coris; 31st December 2012 at 08:16 AM.
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Old 31st December 2012, 08:11 AM   #1976
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Originally Posted by ghmfranken View Post
I am observing values of 8 and 9 on register 27 (ES9018 Status (Read-only)) on my EV board. In the Help of the Sabre GUI I can only find that values 0-3 are described and 4-7 are reserved. Where can I find more detailed information on the meaning of the ES9018 registers and register 27 in particular?
Unfortunately, is quite much secrecy in this field of ESS90xx DACs... The documentation issued by ESS for those (now) 4 years old chips, does not encourage at all in using this chip. I personally do not understand their marketing strategies...
If you can not find something of interest in the chip data sheet, then is not possible elsewhere... Or you may find out by yourself... Or you may read a lot on this forum threads... Huge work!
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Old 31st December 2012, 08:28 AM   #1977
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Originally Posted by Coris View Post
Why you do not try it by yourself first, to have your own objective conclusions...?
It works very well, and (in my setup) it sounds better than with that "max speed spec for..." ESS9018.
because i'm running synchronous clocking with dual lower jitter clocks already (45.1584/49.152MHz, shortly doubling that 90.3168/98.304 with even lower jitter NDK parts), but also because it will increase current demand, increase noise, increase stress (both electrical and thermal) on both the dac chip itself and power supply/decoupling. all the while only offering another non audio multiple that just happens to be 25% faster. 100MHz is already faster than what is needed for oversampling enabled 384kHz, or DSD512, let alone the usual 44.1-96kHz content. there is no technical benefit, only downsides.
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Old 31st December 2012, 12:04 PM   #1978
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Originally Posted by qusp View Post
because i'm running synchronous clocking with dual lower jitter clocks already (45.1584/49.152MHz, shortly doubling that 90.3168/98.304 with even lower jitter NDK parts), but also because it will increase current demand, increase noise, increase stress (both electrical and thermal) on both the dac chip itself and power supply/decoupling. all the while only offering another non audio multiple that just happens to be 25% faster. 100MHz is already faster than what is needed for oversampling enabled 384kHz, or DSD512, let alone the usual 44.1-96kHz content. there is no technical benefit, only downsides.
The current demand of the chip is not increasing dramatically, not any stress whatsoever for the chip and regulators, no thermal problems for the chip itself (do not get warmer either), the noise is not increasing in any way, and most important of all, it sound better...
There are only benefits, but for know all those you (one) must try it by himself first. You may not state something you do not know or have experienced about...
For unknown (yet) reasons, this chip react (and it works) very well at frequencies higher than what is specified in its datasheet.

You or others do not need to trust me about this. Just try yourself, and have own conclusions...
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Old 31st December 2012, 12:15 PM   #1979
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no, I dont need or want to try them, the clocks I have outperform them in every way and are synchronous. the current demand for the chip is increasing 25% and you have gone 25% over max specifications. its really very simple and unavoidable cause and effect. it wont not increase its current demands just because you dont want it to. its all for dubious 'because I think it 'sounds better' reasons.

what exactly makes you think the chip reacts and works very well 25% overclocked? I mean apart from the obvious hand-waving and because you say so, I gather you never measure anything, yet you are always making all sorts of claims of better performance and encouraging people to take risks based on these divinations
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Old 31st December 2012, 01:12 PM   #1980
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I run now my DAC for months overclocked and nothing bad happened... Is not any risk in this.
Is up to you if you want or not to try something. I do not encourage you or others to take risks. Yours to decide this.
For sure you did not measured either to find out that the chip`s current increasing with 25% when overclocking... Is only your "logical" supposition... that everything goes up in the chip if its clock goes up to 125Mhz...
Do it yourself (DIY) and measure it (current need, noise and so on) before state such statements...
To be honest, I just do not care at all if you want or not to try this or something else. Is your business, choice, decision.
I only presented here (and sustained) that this chip it works well in this way...
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