ESS Sabre Reference DAC (8-channel) - Page 186 - diyAudio
Go Back   Home > Forums > Source & Line > Digital Line Level

Digital Line Level DACs, Digital Crossovers, Equalizers, etc.

Please consider donating to help us continue to serve you.

Ads on/off / Custom Title / More PMs / More album space / Advanced printing & mass image saving
Reply
 
Thread Tools Search this Thread
Old 15th May 2011, 12:53 PM   #1851
diyAudio Member
 
Join Date: Jul 2008
Location: Lviv
Quote:
Originally Posted by Bunpei View Post
Does anyone succeed in applying "the lowest" DPLL Bandwidth parameter for I2S input with OSF/On, Jitter-eliminator/On?

One of SDTrans192 Rev. 3.0 users, sunacchi in Japan, reported his recent achievement in his blog page (In Japanese).
BaffaloIIにArduinoを付けてみた: Ama Ama Audio Visual

Click the image to open in full size.

His DACs are dual mono configured Buffalo IIs ( with Fidelix 96MHz oscillator) and controlled by Arduino.
Even for 352.8 kHz/24 plays, he said he succeeded in maintaining locked state for a long period(but not perfect). I think his special enhancements on power supplies of both SDTrans and Buffalo IIs resulted in "the lowest" setting.
What and what for he placed on top of solid caps in amp-cpm4 image?
__________________
If for pristine and pure adoration - it's diyAudio dedication!
  Reply With Quote
Old 15th May 2011, 02:32 PM   #1852
diyAudio Member
 
Join Date: May 2010
silicon carbide(GC#16)
GC#16 absorbs an electromagnetic wave (noise) with kind of a granular whetstone to grind of the quality of silicon carbide system, and to change it into heat.
-yahoo translate
  Reply With Quote
Old 4th June 2011, 09:42 AM   #1853
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Quote:
Originally Posted by Bunpei View Post
Does anyone succeed in applying "the lowest" DPLL Bandwidth parameter for I2S input with OSF/On, Jitter-eliminator/On?

One of SDTrans192 Rev. 3.0 users, sunacchi in Japan, reported his recent achievement in his blog page (In Japanese). ...

... Even for 352.8 kHz/24 plays, he said he succeeded in maintaining locked state for a long period(but not perfect). I think his special enhancements on power supplies of both SDTrans and Buffalo IIs resulted in "the lowest" setting.
sunacchi retracted his previous results and posted his correction.
He had found that his previous results had been collected on OSF/Off mode.
皆さん、申し訳*りませんでした: Ama Ama Audio Visual(In Japanese)

With OSF/On mode his updated achievements are;
ES9018 DAC: Twisted Pear Audio, Buffalo II boards of dual mono mode with Fidelix 96 MHz oscillators
Transport: heavily tweaked Chiaki's SDTrans192 Rev. 3.0 board
PCM 44.1Khz:MEDIUM
PCM 88.2Khz:MEDIUM_H
PCM 96Khz:HIGH
PCM 192Khz:HIGH
PCM 352.8KHz:Use best DPLL Settings

Transport: heavily tweaked ElecrArt's USB Dual Audio board
DSD 2.8M MEDIUM_L
DSD 5.6M MEDIUM

Bunpei's latest results are;
ES9018 DAC: Twisted Pear Audio, Buffalo II single board with NDK 100 MHz, ultra low phase-noise OCXO, 9525D
Transport: "Copper foil & Polyphenylene Sulfide(PPS) Film Capacitor" added SDTrans192 Rev. 3.0 board

PCM 44.1 kHz:THE LOWEST
PCM 48 kHz:LOW
PCM 96 kHz:MEDIUM
PCM 176.4 kHz: HIGH
PCM 192 kHz:HIGH
PCM 352.8 kHz:THE HIGHEST
  Reply With Quote
Old 10th June 2011, 02:09 AM   #1854
glt is offline glt  United States
diyAudio Member
 
Join Date: Oct 2004
Bunpei,

Thanks for the post.
This data experimentally confirms the best capabilities of the Sabre32 DAC with respect to DPLL settings.

And this is the end of the DPLL mystery :-)
__________________
www.hifiduino.wordpress.com
  Reply With Quote
Old 19th June 2011, 07:01 AM   #1855
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Quote:
Originally Posted by glt View Post
And this is the end of the DPLL mystery :-)
I was much pleased with your appreciation. My study wad inspired with your series of valuable and intensive blog articles on the topic of DPLL Bandwidth parameter setting.

I still have two mysteries on the parameter setting.

1. Why DPLL Bandwidth parameter setting value is still effective even if I set;
"Bypass and stop JITTER REDUCTION"
Is the narrow meaning of "JITTER REDUCTION" not the same of "employing DPLL"?
2. What does "Use the best DPLL bandwidth settings" mean?
Some people say "the best DPLL bandwidth settings" is equivalent to a fixed "medium" or "medium-low" setting. If it is so, I guess it is of "Multiply the DPLL BANDWIDTH setting by 128".
  Reply With Quote
Old 19th June 2011, 07:47 AM   #1856
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Default DSD mode processing on ES9018

An ES9018-based DAC, CAPRICE by Fidelix is bringing up a mood of reappraisal of DSD sounds in Japan. The DAC offers an option of raw DSD signal input and I heard that at least two famous audio reviewers in Japan purchased CAPRICE with the option.

According to Functional Block Diagram in Product Brief document of ES9018, it seems for me that DSD signals are converted into PCM at the stage prior to oversampling in ES9018. This approach seems quite different from such DAC chips, TI DSD1702 or DSD1608 that has a dedicated DSD filtering signal path.
How do you feel about this point?
  Reply With Quote
Old 22nd June 2011, 12:02 AM   #1857
glt is offline glt  United States
diyAudio Member
 
Join Date: Oct 2004
Quote:
Originally Posted by Bunpei View Post
I was much pleased with your appreciation. My study wad inspired with your series of valuable and intensive blog articles on the topic of DPLL Bandwidth parameter setting.

I still have two mysteries on the parameter setting.

1. Why DPLL Bandwidth parameter setting value is still effective even if I set;
"Bypass and stop JITTER REDUCTION"
Is the narrow meaning of "JITTER REDUCTION" not the same of "employing DPLL"?
2. What does "Use the best DPLL bandwidth settings" mean?
Some people say "the best DPLL bandwidth settings" is equivalent to a fixed "medium" or "medium-low" setting. If it is so, I guess it is of "Multiply the DPLL BANDWIDTH setting by 128".
1- There is some info here: ESS Sabre Reference DAC (8-channel) I think this only works if you provide your own master clock into the chip (replacing the oscillator)
2- Here is my guess: I think "best" means the next level after "highest" based on the fact that there are no hiccups even when the DAC is cold.
__________________
www.hifiduino.wordpress.com
  Reply With Quote
Old 22nd June 2011, 03:24 PM   #1858
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Quote:
Originally Posted by glt View Post
I think this only works if you provide your own master clock into the chip (replacing the oscillator)
Thank you very much for your information!
I completely agree with your consideration.
  Reply With Quote
Old 27th June 2011, 04:37 PM   #1859
Bunpei is offline Bunpei  Japan
diyAudio Member
 
Join Date: Aug 2008
Chiaki succeeded in playing 384 kHz/32 bit high resolution sources using the combination of his SDTrans384 and ES9018 based DAC with the setting of DPLL bandwidth parameter = "the lowest" and OSF mode="ON" without any unlock events.

In order to achieve this, he redesigned logic circuits in FPGA where I2S signals were generated based on clocks given from external oscillators and PCM data read from SD card. Bunpei reproduced the experiment and obtained a very good sonic improvement.

Who can make a guess on his method?
  Reply With Quote
Old 27th June 2011, 04:55 PM   #1860
diyAudio Member
 
Russ White's Avatar
 
Join Date: Jan 2005
Location: Nashville, TN, USA
Send a message via Yahoo to Russ White
Bumpei,

What do you mean for us to guess at?

This is not surprising. I have been able to do the same via XMOS for quite a while now. I don't know why using FPGA would be any different.

I have also experimented with generating the bit clock and word clock by dividing the master clock. Which worked well, but requires two master clocks.
__________________
Less pulp more juice Twisted Pear Audio.
  Reply With Quote

Reply


Hide this!Advertise here!
Thread Tools Search this Thread
Search this Thread:

Advanced Search

Posting Rules
You may not post new threads
You may not post replies
You may not post attachments
You may not edit your posts

BB code is On
Smilies are On
[IMG] code is On
HTML code is Off
Trackbacks are Off
Pingbacks are Off
Refbacks are Off



New To Site? Need Help?

All times are GMT. The time now is 11:05 AM.


vBulletin Optimisation provided by vB Optimise (Pro) - vBulletin Mods & Addons Copyright © 2014 DragonByte Technologies Ltd.
Copyright ゥ1999-2014 diyAudio

Content Relevant URLs by vBSEO 3.3.2