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Old 4th January 2011, 02:55 PM   #1691
glt is offline glt  United States
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Hi RayCtech,

Thanks for sharing. I guess I can now "take a break" from poking the registers :-)
I also tried all possible configurations and pretty much have ran out of things to try. The best I can do is medium-low after the DAC "warms up"; but even with that setting I would randomly get unlocks after a few/many songs.
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Old 4th January 2011, 05:18 PM   #1692
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Hi RayCtech,

Thanks for sharing. I guess I can now "take a break" from poking the registers :-)
I also tried all possible configurations and pretty much have ran out of things to try. The best I can do is medium-low after the DAC "warms up"; but even with that setting I would randomly get unlocks after a few/many songs.
Hi glt,

I have programmed a test routine to check out all the remaining register value combinations.
There are 18 different register bits settings I need to check out...
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Old 4th January 2011, 06:38 PM   #1693
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There are a few undocumented registers. I know what they do, but it is not in the datasheet, so I will let Dustin make them public only if he wants to. I do make use of them in my firmware.

What I can say is you will get a good idea what they do if you look at the configuration software from ESS site.
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Old 4th January 2011, 07:33 PM   #1694
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Default DPLL UNLOCK issue

The different settings are checked out and other than the disabling of the OSF as Bunpei mentioned earlier I found two possible settings that "cures" the UNLOCK issue.

They both "cures" the UNLOCK issue and when AB compared I cannot hear any big enough difference to rate them against each other.
A - 352.8k/24bit I2S with variant 1, B - 352.8k/24bit I2S with variant 2.
I also compared both I2S variants with - SPDIF 176.4k/24bit and there was not much difference there either.

With respect to Russ comments with regards to undocumented settings and as he previously also have stated he is unable to run the buffalo in 7 and 8 bit True mode even if the modes are supported make me wondering..., and even if these settings to "cure" the UNLOCK issue should not be any secret or big issue I will leave it up to Dustin to comment or reveal the correct solution as he only knows the facts...

Last edited by RayCtech; 4th January 2011 at 07:38 PM.
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Old 4th January 2011, 07:50 PM   #1695
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Ray, You are quite wrong. I never meant to say you could not make it work in 7 or 8 bit true differential. I was really saying you should not. We are talking getting the results you want not just what will *work*. You can set 7 and 8 bit true differential and the DAC will work, but the effects are not desirable (very easy to hear and see with a spectrum analyzer) at all. Also, I did not come to these conclusions today. I have been playing with these registers for quite a long time, and it was Dustin himself who recommended using pseudo differential (in the case of buf-II) when not using 6-bit mode. So when you read "require" read it as "require for best results".
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Last edited by Russ White; 4th January 2011 at 07:53 PM.
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Old 4th January 2011, 08:02 PM   #1696
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On Bufallo II you can do all quantizer setting, but all except 6 will require pseudo differential. This is perfectly normal. Polarity changes are also easy, they just require a little thinking. I am sure you can figure it out. I did it for dual mono support.

The fact is you just have to know how the inputs are connected (which I just shared) and work from there. Pretty simple really. Use the DAC as designed and you will be just fine.

I am not going to take any more of my time to correct you.
Russ, I read this posting as it was written
I can hardly understand it differently now as require obsoletes other options, but I can tell you that the True modes also works excellent

When you states the following:

Quote:
very easy to hear and see with a spectrum analyzer
I expect that what you listen to and measures are the Buffalo II with your IVY and powersupplies and the Crystek 80MHz clock??

What I hear are quite different, but it is also with only one common factor - the Sabre32 chip...

Last edited by RayCtech; 4th January 2011 at 08:10 PM.
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Old 4th January 2011, 08:06 PM   #1697
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I thought I explained myself pretty well. I didn't mean it was not possible to set those registers. You can *set* them and the DAC will work. Also keep in mind I am only talking about the Buffalo II.

So parse words as you will, it matters little to me.
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Old 4th January 2011, 08:24 PM   #1698
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Quote:
Originally Posted by RayCtech View Post
What I hear are quite different, but it is also with only one common factor - the Sabre32 chip...
Absolutely. It very easy to get those modes to sound fine with the ES9018, but you simply need different input routing choices.

All in all based on the best data available from Dustin and the datasheet I stick with 6bit true differential in firmware, as it simply both measures and sounds the best to *me*.

I certainly don't have anything against people who prefer something else, but we got the best measurements and listening results that way.

Use whatever you prefer by all means.

Also, I have been listening to the saber DACs in more ways than I can count. All sorts of clocks and output stages.
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Last edited by Russ White; 4th January 2011 at 08:33 PM.
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Old 4th January 2011, 08:36 PM   #1699
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Default Update to the DPLL UNLOCK issue

I investigated this "problem" and found two possible solutions....

As it happens we all have introduced this "problem" by using other than the ESS recommended default DPLL settings ;-)

When I just now checked the datasheet I "discovered" that one of the solutions to cure the "DPLL" was to use the ESS recommended "default" settings for the DPLL LOL!!!!

I have now verified that this have been the cause my Sabre32 have worked perfectly all the time..
I had not bothered to "tweak" the DPLL settings due to when I tested this a year or more ago I found no improvements.....
As a result the DPLL settings was overridden with the default settings stored in the EEPROM...

Last edited by RayCtech; 4th January 2011 at 08:43 PM.
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Old 4th January 2011, 09:53 PM   #1700
glt is offline glt  United States
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Do you mean "best DPLL setting" in reg25?
Still doesn't explain why spdif would work with lowest dpll setting (and "allow all settings" in reg 25)

Quote:
Originally Posted by RayCtech View Post
I investigated this "problem" and found two possible solutions....

As it happens we all have introduced this "problem" by using other than the ESS recommended default DPLL settings ;-)

When I just now checked the datasheet I "discovered" that one of the solutions to cure the "DPLL" was to use the ESS recommended "default" settings for the DPLL LOL!!!!

I have now verified that this have been the cause my Sabre32 have worked perfectly all the time..
I had not bothered to "tweak" the DPLL settings due to when I tested this a year or more ago I found no improvements.....
As a result the DPLL settings was overridden with the default settings stored in the EEPROM...
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Last edited by glt; 4th January 2011 at 10:06 PM.
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