CCS: 4mA JFET Cascode

[ultralownoise]

Hi everyone,

I'm in need of a low-noise 4mA Constant Current Source.
After reading a lot I decided to build a JFET cascode as the 1/f noise was said to be lower than in regular BJTs and the rejection was said to be quite good either.

On the Protoboard my curcuit works well: J112 on top and 2N4416 on the bottom of the cascode. A poti regulates my current to 4mA very well and with great rejection towards load changes 1k - 3,5k and supply voltage variations of 20-30V.
My concern is now if the two JFETs like each other AND
if the voltage is too low:
The rule Vdg>2*Vgs(off) does not apply to the lower JFET of my cascode.

Should I use different transistors?
Thanks a lot,
uln

 

[BigE]

I would consider the J112 on the bottom, and the 2N4416 on the top, since the top jFET must provide current to the bottom as defined by its Idss. The Idss of the J112 is less than than the min Idss of the 2N4416. You may be forturnate and have selected J112 with Idss of more than 4ma, but I would try reversing them. Also, testing the J112 to have more than 4ma would be necessary.

Why not just use 2 pieces of 2N4416?

 

[Elvee]

Hi everyone,

I'm in need of a low-noise 4mA Constant Current Source.
After reading a lot I decided to build a JFET cascode as the 1/f noise was said to be lower than in regular BJTs and the rejection was said to be quite good either.

On the Protoboard my curcuit works well: J112 on top and 2N4416 on the bottom of the cascode. A poti regulates my current to 4mA very well and with great rejection towards load changes 1k - 3,5k and supply voltage variations of 20-30V.
My concern is now if the two JFETs like each other AND
if the voltage is too low:
The rule Vdg>2*Vgs(off) does not apply to the lower JFET of my cascode.

Should I use different transistors?
Thanks a lot,
uln

Leaving aside all other considerations, the top transistor should have a larger Idss than the bottom one, to give it sufficient Vds breathing space.
With 5mA min Idss for both, this condition doesn't seem to be met.

 

[ultralownoise]

I would consider the J112 on the bottom, and the 2N4416 on the top, since the top jFET must provide current to the bottom as defined by its Idss. The Idss of the J112 is less than than the min Idss of the 2N4416. You may be forturnate and have selected J112 with Idss of more than 4ma, but I would try reversing them. Also, testing the J112 to have more than 4ma would be necessary.

Why not just use 2 pieces of 2N4416?

thanks for your reply.
The J112 in general has a higher Idss and consequently Ugs(off) than a 2N4416.
The J112 is also recommended by the famous JFET CCS Appnote of Siliconix
for current >10mA.
Two 2N4416 is terrible: Ugs(off) for those devices is -2 till about -3 Volts. You don't want your second JFET to be supplied with 1Volts of Drain-Source Voltage as he is hardly in saturation and the whole curcuit becomes unstable as a CCS.

 

[EUVL]

2SK2145Y connected in parallel, trim by degeneration resistor to 4mA.
Cascode by PMBFJ112 to give 4~5V Vds for the Toshiba JFET.

Both in stock at Mouser.


Patrick

 

[ultralownoise]

2SK2145Y connected in parallel, trim by degeneration resistor to 4mA.
Cascode by PMBFJ112 to give 4~5V Vds for the Toshiba JFET.

Both in stock at Mouser.


Patrick

Thank you Patrick!

You mean I should use two cascodes at 2mA in parallel?

I have now cascoded the J113 with the J112 which seems good either.
You think I should rather go for the 2SK2145Y than the J113? How about rejection and noise characteristics? I need the CCS for IEPE measurement microphones.


My problem with these Transistors is that I can't test them before soldering them if they're SMD. How do you do it?

I appreciate your help and time!

 

[jcx]

available supply V and required compliance V at the ccs output are critcal specs for determining ccs options - in general the highest V, highest value R gives the lowest noise current

for active ccs using the device Vth isn't the best that can be done

I would only use fet ccs if the circuit absolutely demanded floating 2 terminal ccs - if the ccs is to a ps rail then you can do better on initial accuracy with a more predictable Vref than jfet Vth

 

[jackinnj]

Worth mentioning -- Walt Jung's 2 part AX articles on current sources which are archived on his website: http://waltjung.org/PDFs/Sources_101_P1.pdf

 

[AndrewT]

............I'm in need of a low-noise 4mA Constant Current Source....................
My concern is now if the two JFETs like each other AND
if the voltage is too low:
The rule Vdg>2*Vgs(off) does not apply to the lower JFET of my cascode..............

this "rule" applies to both jFets.
The upper (or outer) jFET should have a Vds that is >2times Vp (Vgs off upper)

The lower (or inner) jFET should have a Vds that is >2times Vp (Vgs off lower)

The first that is required to allow those two conditions to be met is that Idss of upper >> Id of lower
The second that makes it easier to achieve the above is that the upper device should be a lower gm than the lower device.

A low gm device also happens to be a high Vp device
A high gm device also happens to be a low Vp device.

An example would be the low gm bf244 as the outer device
and the high gm 2sk170 as the inner device.

You require 4mA. Choose a 2sk170 with Idss ~5mA to 6mA (gr grade)
Choose a BF244 with an Idss of 2times the 2sk170 Idss, i.e. > 10 to 12mA
When the 2sk170 has a low Vds, from the outer device, the Id < Idss (expect 70% to 80% of Idss)
At this low Id the outer device will operate with a high Vgs at that 4mA for a 12mA device.

You can measure the Vgs of the outer on a plug board with the inner also in place. That Vgs is the Vds of the inner device. Now check that it meets the "rule".

The minimum voltage across the CCS then becomes 2times Vp outer to comply with the rule.
When the "rule" is broken a "little bit" all that happens is that the CCS is not as "stiff" as it could be.

The "trick" is to select devices with very different gm (Yfs)

 

[ultralownoise]

thank you Andrew!

I now have a bunch of cascodes with different JFET-combinations on the Proto-Board.
Before soldering them and making a noise measurement:
will a parallel cascode at 2mA each be more quiet than a 4mA cascode?

I'm getting really frustrated trying to scientificly build a low noise CCS... I can't seem to find sources of information that don't contradict each other in some way.
After all it seems to be more of a not knowing but testing procedure.

 

[ultralownoise]

I have now bought 2SK369 which are according to the datasheet "super low noise" up to 100kHz:

In order to have a low as possible Constant current source...
-is it better to drive the 2SK369 alone
-or to cascode the 2SK369 with a J112 (I have soldered this one and the noise is not lower than the noise of my 2N4416 cascode)?

I'm not sure if the noise will be much lower if I go up with the Vds and Vdg.
Consequently a cascode is not a good option AT ALL, as the lower JFET, in this case the 2SK369 only gets around 3,7V Vds from the upper JFET (in this case the J112)
The JFET alone, just trimmed by a resistor gets a Vds >10V.

Again any help is greatly appreciated,
thanks

 

[AndrewT]

The cascode version protects the CCS FET from voltage changes.
This ensures a more constant LF performance.

It gets much more complicated at HF.

I don't understand why "noise" is so important to you, nor do I see how you are measuring/assessing the noise.

 

[AndrewT]

You have confirmed that the Vds inside the cascode is 3.7Vds
What is the Vp of the inside FET?

Is it < 50% of 3.7V?

What is the Vp of the cascode FET?
Is your minimum applied voltage greater than, twice the Vp of the cascode device?

 

[ultralownoise]

Hi Andrew thanks for the reply.

I'm measuring the broadband noise (<10Hz - 22kHz) via Audio Precision at the output of my curcuit.
The most important feature of my curcuit should be introducing low-as-possible noise.
The CCS is supposed to drive a sensitive microphone at 4mA, that's why it sould be very quiet.

The Vp of the inner device, 2SK369 is in my case, is -0,48V. The Vdg>2*Vp rule is easily met.

The Vp of the cascode device, the J112 in my case, is -4,4V. My applied voltage is set to a fixed 24V. But the CCS needs to be able to drive different microphone types with different output impdances: I assume a range of 1k to 3,5k in which it should work at a constant current.
That means that the voltage available for the CCS curcuit changes exactly 10V!
(3,5k*4ma - 1k*4mA = 10V)

The thing I'm not sure about is, if the 2SK369 as lower device of the cascode can not perform at its best noise-wise. Maybe it needs higher Vds and Vdg!

 

[AndrewT]

I don't think either Vds or Vdg will have any influence on CCS generated noise.
But I am definitely not a noise guru !

You have tried a FET CCS and a BJT CCs and both give similar, or same, noise performance.
Maybe this points to your other circuits as the excess noise source?

1k microphone resistance.
This will give Ein of approximately 4nV/rtHz
What does the output noise give as your equivalent Ein to the measuring system?

 

[ultralownoise]

I haven't tried BJT CCS as I read about the better 1/f characteristics of the JFETs which is important -> the microphones I want to operate work from 3Hz - 20kHz.
I have tried three JFET cascodes so far and measured their noise.


The J112 J113 cascode was at 220µV
J112 2N4416 cascode 170µV
J113 2SK369 cascode 180µV
As a reference I measured the LT3092 (an easily programmable CCS) for noise.
it showed 168µV of broadband noise.

Most of the noise certainly comes from my Voltage Source but it should still help to put the different cascodes in perspective.

 

[GROGOR]

Try paralleling multiple devices and checking noise with each addition.
All components have inherent random noise, paralleling will average out and therefore cancel out this noise.
Very low noise devices are in fact paralleled multiple devices in one package.