Hi, all,
I am a beginner in this forum, I have read some articles about the modulation method in class D amplifier, and I found that PWM and Sigma-Delta method are the most popular methos used in Class D amplifier.
Do you know any other modulation methods?
What's the relationship between COM and PWM?
Thank you very much.
yours
Jimmy
I am a beginner in this forum, I have read some articles about the modulation method in class D amplifier, and I found that PWM and Sigma-Delta method are the most popular methos used in Class D amplifier.
Do you know any other modulation methods?
What's the relationship between COM and PWM?
Thank you very much.
yours
Jimmy
Keep in mind there are two sub classes to Class D, Class AD and Class BD. AD means there are only two states for the output, typically the supply rails. BD has three states, usually the supply rails and 0V. Both PWM and delta-sigma can be done in AD or BD. To better describe modulation scheme the type and the sub classe can be used. But then there are lots of other 'things' done that are highly confidential to the companies that create them. All done to improve THD perofromance, reduce EMI, etc. Searching around on the web will pull up lots of info. Just don't be fooled by marketing classes such as Class T and Class I.
-SL
-SL
Hi,
Yes PWM and Delta Sigma. PWM is good for helping out with THD. The reason being that since the driver stage will have a rise a fall time that is not 0 so when trying to make a certain output level, say half-scale you will be driving the output stage with a 50% duty cycle but there will be a little bit extra due to the rise and fall time. Since in PWM the switching frequency is fixed, this extra amount is the same no matter what output level you are trying to create. To instead of making THD, it simple make a slight DC offset. If you were to use Delta Sigma, (meanign the output switching frequncy varies with output amplitude) the artifact of rise and fall times will cause THD. Think of it like this.
In Delta Sigma, when triyng to make a 1/2 ful scale output, the output switching frequency might be say 800kHz. However when going to 3/4 full-scale, the frequency is now only 600kHz. Since everytime yo switch, you add an extra error caused by the rise and fall time, the error you add is actaully dependent on the output amplutide you try to generate. This will cause THD.
Sorry if I bore you with some of the limited theory I know, but I thought you might be interested.
Dustin
Yes PWM and Delta Sigma. PWM is good for helping out with THD. The reason being that since the driver stage will have a rise a fall time that is not 0 so when trying to make a certain output level, say half-scale you will be driving the output stage with a 50% duty cycle but there will be a little bit extra due to the rise and fall time. Since in PWM the switching frequency is fixed, this extra amount is the same no matter what output level you are trying to create. To instead of making THD, it simple make a slight DC offset. If you were to use Delta Sigma, (meanign the output switching frequncy varies with output amplitude) the artifact of rise and fall times will cause THD. Think of it like this.
In Delta Sigma, when triyng to make a 1/2 ful scale output, the output switching frequency might be say 800kHz. However when going to 3/4 full-scale, the frequency is now only 600kHz. Since everytime yo switch, you add an extra error caused by the rise and fall time, the error you add is actaully dependent on the output amplutide you try to generate. This will cause THD.
Sorry if I bore you with some of the limited theory I know, but I thought you might be interested.
Dustin
Hi, I really appreciate for your explaination.
BTW, if I use PWM topologies, which method do you recommend to implement on a chip ? half bridge? full bridge ? or self-oscillating(hysteresis , phase-shift controlled) ?
Also , please recommend some articles and threads , thank you very much.
Jimmy
BTW, if I use PWM topologies, which method do you recommend to implement on a chip ? half bridge? full bridge ? or self-oscillating(hysteresis , phase-shift controlled) ?
Also , please recommend some articles and threads , thank you very much.
Jimmy
You can make lot of variant. What I use is fixed PWM at 500Khz a low level and with a PLL slow down to 250Khz a hight power. This help a lot to reduce THD a low level and increase effiency at hight level, when THD is (a bit) less important. Just remember to do first switching frequency step of at least 20Khz to avoid beating between channel if you use common supply! That some kind of delta-sigma modulation without disadvantage! The more hard with this technique is to design feedback that will remain stable...Easy to do do if you think a lot about this! That what I use in my HVI amplifier..
Fredos
www.d-amp.com
Fredos
www.d-amp.com
Hi,
I dont have any experience with "self ocsillating designs" but I have designed a few different digital modultors. One that I did was for doing a headphone amp, and I have also designed modulators that are for high power (100W RMS or so) but really, the modulator is the same, just the ouptut stage can be scaled up for more power. The prototpyes I have designed have been able to reach 106dB of DNR . (That is take a -60dB input signal and notch it out, then measure all the rest of the noise in the 20-20kHz bandwidth and A-weight). I have found that TI has come out with a digital modulator that goes to a bit better than this, so I bought their refference design and will measure it. The modulators I have used are Sigma-Delta (a 9th order one) and PWM. I am really interested in learning the other meathods people use because I think it just plain cool.
CLD.
I dont have any experience with "self ocsillating designs" but I have designed a few different digital modultors. One that I did was for doing a headphone amp, and I have also designed modulators that are for high power (100W RMS or so) but really, the modulator is the same, just the ouptut stage can be scaled up for more power. The prototpyes I have designed have been able to reach 106dB of DNR . (That is take a -60dB input signal and notch it out, then measure all the rest of the noise in the 20-20kHz bandwidth and A-weight). I have found that TI has come out with a digital modulator that goes to a bit better than this, so I bought their refference design and will measure it. The modulators I have used are Sigma-Delta (a 9th order one) and PWM. I am really interested in learning the other meathods people use because I think it just plain cool.
CLD.
Pafi said:
Pafi,
While true that there is a non-linear dependence of the rise and fall times with output current (which I believe is affected by the amount of dead-time you put into the output driver) This affect is secondary to the error caused by having a delta sigma scheme in which the switching frequency is related to the output amplitude.
Let me know what you think. Im open to all criticism.
CLD
dusfor99!
Sorry, I haven't red your statement carefully. Now I've done. You are partly right, there is an effect causes distortion due voltage dependent frequency, but in practice this is typically a very weak effect compared to others (eg. effect of dead time), arises only at really high output voltage, generates only low order harmonics, and can be reduced effectively by a very simple computing in digital domain.
I thought you were talking about one of the main reasons of distortion: dead time induced distortion, wich arises at low level, generates high order harmonics, and cannot be predicted (so cannot be reduced) based on input signal. This distortion arises at every kind of modulation.
BTW: you seem to use different definitions as usual. Please check attached file!
The error you referred to doesn't only depend on rise and fall times, but on difference of delay times too.
Sorry, I haven't red your statement carefully. Now I've done. You are partly right, there is an effect causes distortion due voltage dependent frequency, but in practice this is typically a very weak effect compared to others (eg. effect of dead time), arises only at really high output voltage, generates only low order harmonics, and can be reduced effectively by a very simple computing in digital domain.
I thought you were talking about one of the main reasons of distortion: dead time induced distortion, wich arises at low level, generates high order harmonics, and cannot be predicted (so cannot be reduced) based on input signal. This distortion arises at every kind of modulation.
BTW: you seem to use different definitions as usual. Please check attached file!
The error you referred to doesn't only depend on rise and fall times, but on difference of delay times too.
Attachments
Yes, I totally agree.
So the main contributer to THD is actually the dead-time that is introduced to that there is no "shoot-through" current in the output drivers? I have done some spice simulations showing that the more dead-time between the Nmos and Pmos the more dependece of the output switching speed (whether it be rise/fall, dead-time...) with the load current. One more thing that I suspect (but havent taken a close look into yet) is the mismatch in R-on of the pull-up and pull-down FET's causing THD due to the output impedance changing with output level. Do you have any insight on this area?
Thanks
CLD
Hi Pafi,
What kind of output stage do you reconmend? A dual N-mos with a bootstrapping circuit to drive the high side? My main experience is in creating the PWM modulator itself, an not too much on the most important part of all, the analog output drivers, but that is an area I wnat to venture into.
CLD
What kind of output stage do you reconmend? A dual N-mos with a bootstrapping circuit to drive the high side? My main experience is in creating the PWM modulator itself, an not too much on the most important part of all, the analog output drivers, but that is an area I wnat to venture into.
CLD
Hi, reading your discussions is a good way to learn knowledge, although I do not quite understand . But I will keep learning.
During these days, from the articles I have read, I found self-oscillating modulator(hysteresis, phase-shift) is more popular than other methods, and phase-shift controlled self-oscillating modulator seems better, could you please tell me why it is called phase-shift ? or maybe you can explain this in more details or in another way. Thanks a lot.
Regards
Jimmy
. But I will keep learning.During these days, from the articles I have read, I found self-oscillating modulator(hysteresis, phase-shift) is more popular than other methods, and phase-shift controlled self-oscillating modulator seems better, could you please tell me why it is called phase-shift ? or maybe you can explain this in more details or in another way. Thanks a lot.
Regards
Jimmy
xuhaoz said:Hi, reading your discussions is a good way to learn knowledge, although I do not quite understand
During these days, from the articles I have read, I found self-oscillating modulator(hysteresis, phase-shift) is more popular than other methods, and phase-shift controlled self-oscillating modulator seems better, could you please tell me why it is called phase-shift ? or maybe you can explain this in more details or in another way. Thanks a lot.
Regards
Jimmy
Hi Jimmy,
Ok, I dont have any experience with the self oscillating designs, but I think I have a handle on how they work. Its linked very closely to control theory. Where basically if you have a negative feedback loop that accumulates 180 degrees of phase shift for any given frequncy, the gain at that frequncy better be well below 0dB or the loop will ocsillate. Google "gain and phase margin" to read up on this. Its called "phase-shift" because there is some time delay from the input to the output of the modulator. A phase shift is just that, a time delay calculated as a fraction of the period of the frequncy your talking about. For example, a 1kHz tone has a period of 1ms, if you were to delay that tone by 0.5ms that would be 180degress of phase shift. The formula is
Phase_Shift = 360*(Td*F)
where Td = time delay, and F = frequency
Like before 180 = 360*(.5e-3*(1/1e3))
The self oscillating class-D amps PURPOSELY get set in oscillation and that oscillation is the drive signal to the ouptut MOSFET's. Imagine this is how is works.
Say you have a loop that has a phase shift of 180degree's @ 500kHz, and it has some gain at 500kHz aswell. Then if you put in even the tiniest amount of signal at 500kHz (even the background noise of the system at 500kHz) will cause the look to oscillate. It goes like this. If the input goes up, then the output goes down (due to 180 degree's phase shift) since you have NEGATIVE feedback, the loop will see the UP - DOWN = a bigger UP, the the vicious cycle starts again. Thats a very oversimplified explanation, but it should get you started.
CLD
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