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pr2don 8th May 2006 12:19 AM

The Ir2110
Last week i posted a forum on 2110 I am using IR2110 in my project class d power amp.
being only an amateur in this field i am really struggling to even test the IR. I am not sure how to use it. the data sheet isnt of much help either.
please help? urgent

Eva 8th May 2006 01:02 AM

I agree that the datasheet is a bit obfuscated, but these ICs are not so hard to use. I got IR2112 working in my first attempt, I only blew one of these ICs and it was because I shorted the logic supply to ground (strange way to blow it).

Could you describe the exact problems or doubts that you have ran into?

classd4sure 8th May 2006 08:06 AM


Try testing it in simulation too. It'll allow you to work out at least a few particulars in a much faster, and cheaper way.

Also, when you're stuck, it allows you to post a schematic for us which we really appreciate when it comes to helping to troubleshoot.

IR seems to have a Pspice model for that driver.

pr2don 8th May 2006 10:02 AM

The ir2110 4 my class d power amp
2 Attachment(s)
I have attached my schmatic 4 the power amp. My problem I dont get any output, why i connect on the board. am getting a very small single which look like noise. Simulation dont give me result also. could you plz advice me

Ouroboros 8th May 2006 10:18 AM

The schematic shows V3 the wrong way round!

Also, the IR2110 (and all the other similar devices) need the logic inputs referred to the Vss (most negative) supply, which is a real pain for using these chips in Class-d amplifiers with symmetrical power rails.

classd4sure 8th May 2006 10:54 AM

Yep good eye, V3 is the wrong way around :)

In general, to me it looks like your housekeeping and rail voltages are a complete mess. Reread the data sheet, try looking at the schematic of the chip on it and that should help you decipher things.

VCC is scary wrong. Use a seperate supply for VCC, reference it off Vss properly. VDD could likely be built off it, properly bypassed, but it may require another supply too, whatever the rest of your logic circuitry is using. Not sure about that. Eva?

You're missing a connection node for Vcom.

Forget Rd and the "snubbers". They're the last thing you ought to be worrying about at this point.

Reference your input signals properly as already mentioned in the above post... and that should do the trick.

Eva 8th May 2006 01:57 PM

There is actually nothing wrong with V3, as it's drawn backwards but the voltage is negative to compensate.

The chip is not wired properly, and if you tried it that way in a real prototype it's very likely to be damaged thus requiring replacement. Be careful since that kind of electronic toys are not cheap :D

VCC(+) and COM are the supply pins for the lower quasi-floating gate drive cell.

VB(+) and VS are the supply pins for the higher floating gate drive cell.

VDD(+) and VSS are the supply pins for the (quite fragile) logic input stage, which may be fed from a lower voltage such as 5V, or directly from VCC.

The ground of the fully floating gate drive cell (VS) is allowed to rise up to 500V above the ground of the lower cell (COM), and is also allowed to fall as much as 15V below COM for short periods of time.

The ground of the logic input stage (VSS) is allowed to float almost +/-5V with respect to COM in order to allow for better noise rejection in very complex applications. That feature is hardly required so COM and VSS are usually tied together.

The following schematic shows a working IR2112 application (a weaker version of IR2110) driving two banks of three IGBTs, with external buffers and connected as a half bridge. By 'working' I mean that I'm listening to it right now.
The supply voltage for the lower cell is 18V and is derived through R17 and D10 in a very straightforward way. The supply voltage for the logic section is 5V and is derived from those 18V through a L78L05 as I'm using also TTL gates and optocouplers. The supply voltage for the upper cell is derived from the 18V of the lower cell through D3, so that C7 gets replenished every time the lower cell turns on. The capacitor values shown are high enough to prevent any trouble due to starvation.

HIN and LIN turn on the corresponding high and low gate drive cells when they are driven logic-high. SD disables the entire IC if it's driven logic-high, and it does in such a way that the gate drive cells won't be turned on again until the next rising edge of the corresponding HIN or LIN input (thus allowing to terminate switching cycles prematurely and leaving both cells off until the next cycle begins).

IR2112 is rated at +-200mA so it requires buffering in most applications, but IR2110 is rated at +-2A and can drive gates directly, altough the "resistor+resistor/diode" networks shown are strongly recommended in order to control switching slopes and EMI.

The 2.2uF capacitors shown are high ESR in order to allow for paralleling 100nF ceramics without any resonance (checked in the actual PCB) and the resulting capacitor pairs are placed in close proximity.

Ouroboros 8th May 2006 02:23 PM

Eva wrote:
'There is actually nothing wrong with V3, as it's drawn backwards but the voltage is negative to compensate.'

You are quite right. I didn't notice the back-to-front connection!

sivan_and 8th May 2006 03:21 PM


Eva: wrote:The 2.2uF capacitors shown are high ESR in order to allow...

classd4sure 8th May 2006 03:26 PM


Originally posted by sivan_and

Without the high ESR you'd need to use other means to damp the Q of the resonant circuit that would form by bypassing it with another cap.

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