Has anyone tried TI’s PurePath Digital™ chips ? I am asking about their "digital audio PWM processor" (TAS50XX) and "Digital Amplifier Power stage (TAS5111A, TAS5112A,..) lines of chips.
These pwm processors accept digital streams of a wide range of sample rates and sizes and they are meant to be paired with their digiital amplifier power stages for a solution that eliminates the dac entirely.
Has anyone tried these ? How do they compare (sound quality-wise) to other chips that are popular around here (Tripath/Hypex/Phillips/UcD...) ?
Besides TI who else in involved actively in such "dac-less" solutions ?
These pwm processors accept digital streams of a wide range of sample rates and sizes and they are meant to be paired with their digiital amplifier power stages for a solution that eliminates the dac entirely.
Has anyone tried these ? How do they compare (sound quality-wise) to other chips that are popular around here (Tripath/Hypex/Phillips/UcD...) ?
Besides TI who else in involved actively in such "dac-less" solutions ?
i've heard them in a 50w incarnation made by a friend of mine. Sounded fantastic (say 1-1,5 years ago?). Tact uses them too.
One feat they share with the ucd type amps is the (typically class d?) brilliant representation of highs (cymbals, crashes, hihats etc). Nice and smooth but *very* detailed.
One feat they share with the ucd type amps is the (typically class d?) brilliant representation of highs (cymbals, crashes, hihats etc). Nice and smooth but *very* detailed.
Hi
I've used them (TAS5111) in an analog setup with good results. The Purepath design are actually just a gate driver + mosfets + security circuits combined into one chip. They are designed for all digital solutions, but if you put a comparator an a couple of level shifters in front of a Purepath chip, you'll have everything you need to make a good sounding self-oscillating amplifier. Be aware though, that the new chips, tas5261 (300W) etc., shuts down if no pwm signal has been received for more than 17us. Given that the pwm frequency drops to zero at full modulation in a self-oscillating design, this might turn out to be a huge obstacle though. For analog clocked pwm designs this will not be a problem. I've attached a picture below showing how a clocked PWM modulator can be constructed, without the need for a noisy (and difficult to generate) triangle signal. This squarewave clocked PWM modulator is insensitive to clock noise and nonlinearity, because the square wave clock is feed into the feedback loop. For comparison, a triangle base modulator runs in open-loop, i.e. every imperfection in the triangle waveform distorts the audio signal and adds noise. The square wave clocked modulators is not only more simple, but also much better performing.
I've used them (TAS5111) in an analog setup with good results. The Purepath design are actually just a gate driver + mosfets + security circuits combined into one chip. They are designed for all digital solutions, but if you put a comparator an a couple of level shifters in front of a Purepath chip, you'll have everything you need to make a good sounding self-oscillating amplifier. Be aware though, that the new chips, tas5261 (300W) etc., shuts down if no pwm signal has been received for more than 17us. Given that the pwm frequency drops to zero at full modulation in a self-oscillating design, this might turn out to be a huge obstacle though. For analog clocked pwm designs this will not be a problem. I've attached a picture below showing how a clocked PWM modulator can be constructed, without the need for a noisy (and difficult to generate) triangle signal. This squarewave clocked PWM modulator is insensitive to clock noise and nonlinearity, because the square wave clock is feed into the feedback loop. For comparison, a triangle base modulator runs in open-loop, i.e. every imperfection in the triangle waveform distorts the audio signal and adds noise. The square wave clocked modulators is not only more simple, but also much better performing.
Attachments
You can see in the schematic below how I did the level-shifters, configured the TAS5111 IC and set up the self-oscillating hysteretic PWM modulator (U4A). The output filter is not intended for audio applications and the output feedback isn't shown. If you modify the output filter though by decreasing C8 and C9, you'll have a full working audio amplifier using that schematic.
About the clocked pwm modulator above. I've shown in the paper posted here http://www.diyaudio.com/forums/showthread.php?s=&threadid=90404 that the clocked design actually only has about 6dB less open-loop gain than a self-oscillating amplifier. In other words 0.005% of THD for a self-oscillating design, will turn into 0.01% THD for a sqare wave clocked design.
About the clocked pwm modulator above. I've shown in the paper posted here http://www.diyaudio.com/forums/showthread.php?s=&threadid=90404 that the clocked design actually only has about 6dB less open-loop gain than a self-oscillating amplifier. In other words 0.005% of THD for a self-oscillating design, will turn into 0.01% THD for a sqare wave clocked design.
Attachments
Indeed "digital" power stage is very convenient for analog class D design too, i've tried TDA8939 but it's an obsolete part unfortunately. Did you have any measurement of the real amp?
I used it to drive a magnetic actuator with hall-sensor feedback, so no I can't provide any audio measurements. What I can tell you is that the principle works well and with the low dead time in a Purepath power stage, I would expect nothing else than good performance. A Purepath works well in an open-loop design (all digital solution) and I can only imagine that it would improve when an analog loop is added around it.
BTW. the new tas5261 actually has a build in noise shaper that corrects the error difference below 50ns between the reference PWM signal and the output PWM signal. This means that this all digital solution actuall isn't an open-loop design if I have to be strictley correct.
BTW. the new tas5261 actually has a build in noise shaper that corrects the error difference below 50ns between the reference PWM signal and the output PWM signal. This means that this all digital solution actuall isn't an open-loop design if I have to be strictley correct.
That is not bad for an open-loop design. I can imagine that he used large bank of supply decoupling capacitors or a smps to overcome the distortion caused by supply pumping. I remember having read that 0.01% THD in a open-loop full-bridge requires a supply impedance below 5mohm. For a hal-bridge design the impedance has to be even lower.
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