I have constructed an UcD according to Putzey's patent using discrete components (with some changes such as cascode in differential stage etc). One thing I however have noticed is that it rapidly increases distortion when power level goes up, so does crowbar current (already using fine mosfets, fdp3682)
I suspect this to be because of the slow gate drive, and the weak pull down which causes false turn-on with acceptable rise times. As I see it, the cure to this is using strong integrated gate drive such as MAX627 or HIP2101 with external dead time generation using logic gates with R/C/D network.
How much will improved gate drive affect distortion across the entire power range? Second, what solution to this problem is used in the commercial Hypex UcD180 and UcD400 units? Third, how much crowbar current is recommended at different power levels in order to obtain best sound quality? Those great current spikes of 25+ A at full power scare me.
I suspect this to be because of the slow gate drive, and the weak pull down which causes false turn-on with acceptable rise times. As I see it, the cure to this is using strong integrated gate drive such as MAX627 or HIP2101 with external dead time generation using logic gates with R/C/D network.
How much will improved gate drive affect distortion across the entire power range? Second, what solution to this problem is used in the commercial Hypex UcD180 and UcD400 units? Third, how much crowbar current is recommended at different power levels in order to obtain best sound quality? Those great current spikes of 25+ A at full power scare me.
Hi,
You make it sound as though you read the patent and slapped this thing together in just a few minutes. What did you really base your circuit off, what changes to it did you make?
What's crowbar current?
Method of contruction?
The Hypex solution was research, trial and error, in depth understanding...
The schematics you used were intended to facilitate that purpose.
You make it sound as though you read the patent and slapped this thing together in just a few minutes. What did you really base your circuit off, what changes to it did you make?
What's crowbar current?
Method of contruction?
The Hypex solution was research, trial and error, in depth understanding...
The schematics you used were intended to facilitate that purpose.
classd4sure said:
I used a schematic I found in this forum and did quite a bit of optimization to it to reflect the components I have available here (I dont know whose it was). Best I could do was ~0.05% @ 1 W and ~0.5% at 100W.
The problem if I go for a fully IC solution is that I need to arrange for soft start-up in some way other than manipulating the tail current of the differential pair. I guess the best would be to keep the discrete input stage and go for an integrated R/C/D dead time generator together with some ultrafast gate driver such as HIP2101. Btw does anybody have a spice model for this circuit?
phase_accurate said:
That was my guess as well, I was hoping he'd come up with that term.
zilog said:
Ah now that is different. I find it unusual that you'd go to such effort to build a circuit without even knowing who's schematic it was, or the thread it came from, but it sounds like it might be one of mine.
You see, I've posted a number of circuits, some less good than others. It helps to know what you're dealing with, so rather than saying you based your circuit off the patent with just a few quick improvements, like you know exactly what you're doing and "etc", link to the circuit you're working from, post your own version of it reflecting the changes you've made to it, and state why you've made them. Changes made to reflect whatever parts you have around or those that are available to you are not conducive to improved performance without in depth understanding.
There's a wide selection of parts that will work, but I find more often than not people make "improvements" by throwing in a certain transistor they think is a better choice, but don't understand its purpose there, and thusly degrade performance.
Then there are plenty of other factors you might address before blaming the circuit itself.
Did you do it point to point, through hole, dual layer SMD, maybe it's all on a protoboard?
Is your layout any good? Are those mosfets really the best, how do you know? I remember when I recommended trying them, but of all the ones I've tried... they're not the best.
What did you use to take those measurements with?
You obviously got to hear it and that was the intention. How much you learn from it is entirely up to you. If you want ideal performance and higher power you're going to have to work very hard at it, or buy it from Hypex, they're worth the money.
Regards,
Chris
I think I expressed myself poorly, I have not built it, I still only simulate the thing in LTSpice to sort out the greatest caveats before going through the tedious work of designing start-up/protection circuitry and laying out the PCB. I dont remember whose schematic is, but your name does ring familiar.
I have gotten the design to simulate well, but it seems to me that crossover currents increase a bit too much when the power level of the output increases over a certain limit. What I am interested is to hear from you how your FET current depends on power level, and how you succeeded in the THD compartment for different power levels.
I have also seen that lower frequencies get lower THD than higher ones, I simulate THD using a 20 kHz sine. I however dont fully trust LTSpice when it comes to THD.
As it comes to the transistor choice - there isnt many bipolar ones to choose from in Sweden (ELFA) that handle excess of 100V, and good power mosfets are really hard to get, I got mine (fdp3682) as a gift from a guy at an audio company nearby, otherwise I would still have been stuck with IRF540.
I have gotten the design to simulate well, but it seems to me that crossover currents increase a bit too much when the power level of the output increases over a certain limit. What I am interested is to hear from you how your FET current depends on power level, and how you succeeded in the THD compartment for different power levels.
I have also seen that lower frequencies get lower THD than higher ones, I simulate THD using a 20 kHz sine. I however dont fully trust LTSpice when it comes to THD.
As it comes to the transistor choice - there isnt many bipolar ones to choose from in Sweden (ELFA) that handle excess of 100V, and good power mosfets are really hard to get, I got mine (fdp3682) as a gift from a guy at an audio company nearby, otherwise I would still have been stuck with IRF540.
Still simulating is again a very different story.
The FDP3682 mosfet models from fairchild, I couldnt' even get to switch with enough accuracy to be at all meaningful. They were totally useless in simulation land.
I can't remember where it is exactly but I had posted Pspice results at different frequencies and power levels, but that was for a 35V circuit too.
It's really pointless to try optimising the drivers to that degree in spice because it's not modelled well at all.
It is good for learning interactions though, which will help you optimize the real circuit. Obviously that kind of trial and error is very costly and that's why I recommend if you want it to be as good as possible at a reasonable cost, especially at higher power, you're better off to buy it. But throwing together a low power P2P version just to get to hear it is a real experience and one well worth having.
It really does take alot of work to get it to work even half decent in reality, and personally I've not attempted a higher power version because I lack the necessary equipment to do so.
In simulation I've succeeded rather well for shoot through, but it took alot to learn how to do it, and I dont' trust it to be at all realistic. Fall time should be twice as fast as rise time and intersect at Vth, with strong enough drive so that miller affect doesn't control it, without having the drivers loaded down.
It's a real balancing game and requires good component selection. None of it is any fun.
Regards,
Chris
The FDP3682 mosfet models from fairchild, I couldnt' even get to switch with enough accuracy to be at all meaningful. They were totally useless in simulation land.
I can't remember where it is exactly but I had posted Pspice results at different frequencies and power levels, but that was for a 35V circuit too.
It's really pointless to try optimising the drivers to that degree in spice because it's not modelled well at all.
It is good for learning interactions though, which will help you optimize the real circuit. Obviously that kind of trial and error is very costly and that's why I recommend if you want it to be as good as possible at a reasonable cost, especially at higher power, you're better off to buy it. But throwing together a low power P2P version just to get to hear it is a real experience and one well worth having.
It really does take alot of work to get it to work even half decent in reality, and personally I've not attempted a higher power version because I lack the necessary equipment to do so.
In simulation I've succeeded rather well for shoot through, but it took alot to learn how to do it, and I dont' trust it to be at all realistic. Fall time should be twice as fast as rise time and intersect at Vth, with strong enough drive so that miller affect doesn't control it, without having the drivers loaded down.
It's a real balancing game and requires good component selection. None of it is any fun.
Regards,
Chris
This is not my first class d amp, I have breadboarded a SODFA before, which sounded good for weeks until it suddenly broke into flames without any prior warning. When it comes to buying stuff - I will never do that as I am interested in the technology itself, not the ownership thereof. The only thing I lack in my lab is differential probes for the scope, will make measuring gate drive intersection difficult, but I guess a well designed transformer can fix that.
zilog said:
You are right though BTW, these drivers aren't good for higher power. Hypex does use them for the 180, not for the 400.
The 400 has slew controlled gate drivers and I can't tell you more about it than that.
You're free to try your own version of driver, and IC might work but you lose configurability and will have to design around it. Lots of work either way.
Yeah, but as it seems my major limitation right now is false turn-on from miller capacitance I suspect I will need the strong pull down of a dedicated gate drive chip. Second, I suspect I want to get rid of the current mirror drive approach as during each switching transition, the miller effect of the current mirror BJT:s causes the comparator to turn on both high side and low side FET:s shortly. I suspect that interfacing this current mirror to a fixed voltage load will reduce this problem.
Never had that happen. Suspect not enough comparator source current to keep it well in control over miller current.
I've said it before but this whole thing is just one interaction, everything acts with everything else and it takes alot of work to figure out how everything affects everything else.
As far as dV/dT induced turn on the stronger drive won't have much affect if the mosfet is poorly chosen and therefore susceptible to it. By the time that current hits the driver it's already far too late.
I've played with the circuit on both LTspice and Pspice and I can tell you LTspice models the induced turn on much worse than Pspice. Which is more accurate to reality? Probably neither one.
Regards,
Chris
I've said it before but this whole thing is just one interaction, everything acts with everything else and it takes alot of work to figure out how everything affects everything else.
As far as dV/dT induced turn on the stronger drive won't have much affect if the mosfet is poorly chosen and therefore susceptible to it. By the time that current hits the driver it's already far too late.
I've played with the circuit on both LTspice and Pspice and I can tell you LTspice models the induced turn on much worse than Pspice. Which is more accurate to reality? Probably neither one.
Regards,
Chris
Then I must ask you, how many ampere during spike through do you allow your transistors? I get maybe 7-8A top current when driving 2W into 4 ohm if I want to achieve acceptable THD, and ~30A at 90% of full power while the average current is much below that.
I try not to rely too much on THD calculations when designing the output stage, but instead look at the inductor current waveform. I want it to consist of straight lines with small radius corners and low ripple when the output of the amp swings, correct assumption?
I try not to rely too much on THD calculations when designing the output stage, but instead look at the inductor current waveform. I want it to consist of straight lines with small radius corners and low ripple when the output of the amp swings, correct assumption?
zilog said:
The aim is for non at all at higher output levels, and usually settle for a few amps at very low power levels, which keeps distortion low.
Deadtime needs to be minimal, but there are also different kinds of shoot-through. dV/dt induced turn on is unacceptable and relies on proper part selection, layout, slew rates, etc.
The comparator should remain rather immune to it so long as it's properly configured.
Regards,
Chris
Chris,
What kind of problems did you suffer when using the fairchild models? When I simulate using FDP3682 and the IRF540, they dont behave in any way similar, the FDP looks much faster when simulating, but is a real bitch to drive since it seems to have infinite gate capacitance..
I guess the only way to find out is to make a PCB and try.
What kind of problems did you suffer when using the fairchild models? When I simulate using FDP3682 and the IRF540, they dont behave in any way similar, the FDP looks much faster when simulating, but is a real bitch to drive since it seems to have infinite gate capacitance..
I guess the only way to find out is to make a PCB and try.
zilog said:
I actually used the part. The spice model from fairchild would simply not converge until all tolerances were back all the way off making for a totally useless simulation, and even then it would only do a cycle or two before comming up with some error. I used IRF540 model for all my simulations thereafter in order to better compare different revisions and leaving that as a constant more less.
I wasn't pleased with the actual mosfet itself either, but without having a scope to tune the circuit properly... that sort of statement is only worth so much.
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