Hi analogspiceman,
thank you for your constructive comments. I will try to answer some of your remarks.
Regarding optocoupler, I am worried much more about possible jitter and asymmetric delay (between the primary and the secondary part) than about the absolute delay number.
I have observed driver transformer waveforms in simulation under what I thought would be a worst case scenario (square wave input driving amplifier into clipping). I thought that both the current and the voltage waveform were acceptable. I will try the test again with your recommendation.
Yes, transformers. I hope that in the end that will not be the end of the whole project. Normal SMPS transformers are useless for this application. But I have measured some bifilar wound toroids, and I can achieve leakage inductance around 50nH. Another field of opportunity is use of ideas presented by Edward Herbert in matrix transformers and coaxial transformers . Lastly, I have an old Motorola RF handbook. In the past I have sucesfully used some construction tips for RF broadband transformers in 6kW continious, 20kW peak transformer for resonant capacitor charger.
Those RC snubbers across the secondaries in the published schematic are only a reminder that probably something more serious will be required at the end. But thank you for reminding me that i should finish the transformer before i proceed with the PCB. I guess I was a little overwhelmed with the whole idea.
Catching freewheling current of output inductors will be another challenge. That's why 30mOhm Mosfets are used as drivers and transformer coupling is used. I want to minimize the dead time as much as possible.
Thanks again for comments and
best regards,
Jaka Racman
thank you for your constructive comments. I will try to answer some of your remarks.
Regarding optocoupler, I am worried much more about possible jitter and asymmetric delay (between the primary and the secondary part) than about the absolute delay number.
I have observed driver transformer waveforms in simulation under what I thought would be a worst case scenario (square wave input driving amplifier into clipping). I thought that both the current and the voltage waveform were acceptable. I will try the test again with your recommendation.
Yes, transformers. I hope that in the end that will not be the end of the whole project. Normal SMPS transformers are useless for this application. But I have measured some bifilar wound toroids, and I can achieve leakage inductance around 50nH. Another field of opportunity is use of ideas presented by Edward Herbert in matrix transformers and coaxial transformers . Lastly, I have an old Motorola RF handbook. In the past I have sucesfully used some construction tips for RF broadband transformers in 6kW continious, 20kW peak transformer for resonant capacitor charger.
Those RC snubbers across the secondaries in the published schematic are only a reminder that probably something more serious will be required at the end. But thank you for reminding me that i should finish the transformer before i proceed with the PCB. I guess I was a little overwhelmed with the whole idea.
Catching freewheling current of output inductors will be another challenge. That's why 30mOhm Mosfets are used as drivers and transformer coupling is used. I want to minimize the dead time as much as possible.
Thanks again for comments and
best regards,
Jaka Racman
No problem. There are precious few of we analog/SMPS designer types around who are also interested in class d amplifier design. I am vicariously enjoying immensely your pushing the design frontiers with your ampliverter work. If I weren't so busy with paid work, I'd love to make up a schematic and layout of a SMPS/leapfrog amp combo for the DIY community. Class d technology is such an elegant symphony of such a variety of skills, it's too cool not to share.Jaka Racman said:
Bear in mind, I am not implying that a problem necessarily exists, just that it behooves you to check the design under worst case drive conditions, i.e. as close as it can get to unipolar drive (most likely to lead to dc offsets, transformer saturation and other nasty explosive problems).
Low interwinding leakage is good, but it invariably comes at the cost of higher interwinding capacitance. Sometimes (usually at high voltages) capacitive losses can end up exceeding inductive losses when leakage inductance is minimized (the tradeoff goes as the fourth power of leakage). The top transformer will "see" three times the voltage swing between windings as will the bottom transformer. At a minimum, this will skew voltage balance during the switching transitions. The only way to ensure strict voltage balance is to put the secondaries in parallel (however, I don't know that perfect balance is best). You might consider putting small, tightly coupled common chokes in series with each transformer primary if capacitive imbalance turns out to be a problem.
As well you should, but don't expect to be able to reach perfect switch timing with no glitches. If you don't catch the energy stemming from timing errors it will most likely end up avalanching the output MOSFETs. Are you sure they can take it?
Regards -- analogspiceman
Hi analogspiceman,
just a quick answer. I intend to cope with interwinding capacitance problem in another way. I will use three separate cores for the secondary winding, but primary winding will be common for all three cores. So actually I will not use three but only a single magnetic structure. First try will be three toroids with single layer bifilar secondary winding stacked on top of each other. Primary will then be wound over all thre cores. Kind of a matrix transformer if you like. Another possible solution is use of coaxial transformers, where one half of the secondary sees half bridge capacitive divider node and another half of the secondary sees switching node.
You are probably right about avalanching also. But since this first design will be near UcD400 characteristics, peak currents in inductors will be around 7-8A. So maybe I will get around that unpunished for the first try, but on the long run catch diodes will be probably necessary.
Best regards,
Jaka Racman
just a quick answer. I intend to cope with interwinding capacitance problem in another way. I will use three separate cores for the secondary winding, but primary winding will be common for all three cores. So actually I will not use three but only a single magnetic structure. First try will be three toroids with single layer bifilar secondary winding stacked on top of each other. Primary will then be wound over all thre cores. Kind of a matrix transformer if you like. Another possible solution is use of coaxial transformers, where one half of the secondary sees half bridge capacitive divider node and another half of the secondary sees switching node.
You are probably right about avalanching also. But since this first design will be near UcD400 characteristics, peak currents in inductors will be around 7-8A. So maybe I will get around that unpunished for the first try, but on the long run catch diodes will be probably necessary.
Best regards,
Jaka Racman
And thanks for the links. I just "invented" similar toroid transformer structure some time ago but wasnt any sure about useability 
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