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Old 26th June 2005, 08:29 AM   #1
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Default Measuring deadtime

It seems that deadtime is usually only evaluated by indirect measures: gate waveforms, output cross conduction current waveforms, finger application, sparks and smoke. I would like to hear from some of the experts the techniques they use to measure deadtime directly.

Brian
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Old 26th June 2005, 01:46 PM   #2
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There is no more direct way of observing dead time than the gate waveform. The gate wave form tells you everything you want to know.
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Old 29th June 2005, 08:00 AM   #3
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Dead time can be measured by looking for body diode conduction, which shows up as a blip on the switched node beyond the power rails (either VIN or GND).

When doing the probing, you must eliminate the scope probe ground aligator clip, and attach a straight wire from the scope probe's outer ground shield directly to the ground plane.

The lack of dead time usually manifest itself as smoke, or low efficiency in the best case.

Gate waveform can be misleading. The gate is usually realized using polysilicon, which is resistive, so there's some RC delay between gate pin going low and the channel disappearing. Renesas SO8 FETs are exceptions: the gate resistance is so low, it may kill some drivers. Anyway, the source inductance is probably the limiting factor, unfortunately it is internal to the package, so you can't see the true Vgs.
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Old 29th June 2005, 09:13 AM   #4
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Quote:
Originally posted by tawen_mei
Dead time can be measured by looking for body diode conduction, which shows up as a blip on the switched node beyond the power rails (either VIN or GND).
This means that the dead time is already relatively long. There is absolutely no reason for making the dead time any longer than needed for the coil to force the output to the opposing rail (Iout=0). Making it longer only increases distortion, but does nothing to improve efficiency (worse in fact). Making it shorter improves distortion, but since the charging/discharging of the parasitic capacitance is now partly done through the incoming FET (instead of by the output coil in a resonant transition), idle losses go up. In any case, if you can read dead time from the forward bias "blip", the dead time is too long anyway.

Quote:
Originally posted by tawen_mei
Gate waveform can be misleading. The gate is usually realized using polysilicon, which is resistive, so there's some RC delay between gate pin going low and the channel disappearing. ).
Most power FETs have metal gates. If they were polysilicon they'd be too slow for use in class D. The lead inductances form the limiting factor towards direct readout of the gate waveform. At realistic gate switching speeds (50-100ns), the fidelity of the waveform at the gate pin is still more than sufficient. Faster switching speeds make no sense if the dead time is long enough to be seen as a diode drop on the scope screen.
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Old 29th June 2005, 11:17 AM   #5
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Using gate-source waveform to measure deadtime involves setting a "threshold" to distinguis between "on" and "off" state.
Some propose to use the exact moment where gate waveform makes a "glitch" (plateau zone?): that's the moment where the mosfet is really enhanced, right? But when do you say that the mosfet is "off" again?

Another difficulty is to measure both waveforms at a time, as the ground reference is not the same and you can make a shortcircuit with the oscilloscope probe.

If you measure only one Vgs waveform at a time, can you make exact dead-time measurements from that? If not, how is it easily done?

I attach a figure where the plateau zone can be seen (if no one corrects me)
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File Type: jpg gate_drivers.jpg (29.2 KB, 461 views)
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Old 29th June 2005, 01:50 PM   #6
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Quote:
Originally posted by Pierre
Using gate-source waveform to measure deadtime involves setting a "threshold" to distinguis between "on" and "off" state.
Some propose to use the exact moment where gate waveform makes a "glitch" (plateau zone?): that's the moment where the mosfet is really enhanced, right? But when do you say that the mosfet is "off" again?
The plateau zone in no way indicates threshold. As long as the FET isn't fully on (=become resistive), Vgs and Id are directly related per the transfer function.
Quote:
Originally posted by Pierre
Another difficulty is to measure both waveforms at a time, as the ground reference is not the same and you can make a shortcircuit with the oscilloscope probe.
You can read everything from only one gate waveform. For practical reasons you would take the bottom FET. Of course you'll want to check the high side behaves similarly. This is done using the oscilloscope's A-B mode. You would never want to tie the scope chassis to a switching waveform.
Quote:
Originally posted by Pierre
I attach a figure where the plateau zone can be seen (if no one corrects me)
It looks like it.
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Old 29th June 2005, 01:55 PM   #7
Pierre is offline Pierre  France
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Then, looking at the low side Vgs waveform, in order to measure dead-time with some precision, where exactly do you take the ON state and the OFF state? That's my main question.
Depending on that you will have a deadtime or another. Do you assign the "on" state as soon as it reaches the nominal threshold from the datasheet and "off" when it crosses it again?

I assume that this measurement are done with no signal and the output loaded with the nominal load (although that shouldn't change things too much, imho).
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Old 29th June 2005, 02:39 PM   #8
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Quote:
Originally posted by Pierre
Do you assign the "on" state as soon as it reaches the nominal threshold from the datasheet and "off" when it crosses it again?
A FET is "on" when it is has become a resistor. A FET is "off" when no drain current flows while Vds>>0. The bit in-between is where the action is, and this cannot be treated using a simple variable called "dead time".
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Old 29th June 2005, 02:47 PM   #9
Pierre is offline Pierre  France
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OK, Bruno, but you stated that you must measure dead-time by looking at the gate waveform.
Then you must see something that tells you that the mosfet is "on" (of course, when it is behaving like a resistor). The question is: do you consider that this point is reached at threshold voltage or do you look at some other characteristic in the Vgs waveform to determine when the mosfet is conducting?
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Old 29th June 2005, 02:58 PM   #10
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The mosfet is ON when the plateau is over. This means that the point when we call a mosfet ON depends very much on drain current.
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