Nth Order Sigma-Delta

[Tim__x]

In a >=2nd order sigma-delta amp, where do the extra lowpass sections go? I assume in the feedback loop and not in between the first integrator and the comparator. And how does one choose the corner frequencies for each extra lowpass/integrator?

Sorry for the newbish question, and thanks in advance for tolerating it.

Tim

[phase_accurate]

And how does one choose the corner frequencies for each extra lowpass/integrator?

All integrators usually have the same time-constant, but the difference lies in the different gains when they are summed.

What loop order are you looking at ?

Regards

Charles

[Tim__x]

All integrators usually have the same time-constant, but the difference lies in the different gains when they are summed.

True, I wasn't thinking there. Though I seem to remember seeing amps with a lowpass instead of an integrator in the feedback loop. How does one choose the unity gain frequencies in the integrators? Assuming that is the best way to describe an integrator's response.

What loop order are you looking at ?

I'm not planning on any class D amps right now, in the future I'll probably build something 2nd order, but for now I just want a greater understanding of the topology.

If you know of any websites or readily available books that would give me some introductory loop theory (beyond gain vs bandwidth and the sort) that would be helpful.

[Bruno Putzeys]

Normally the forward path of the loop is a chain of integrators. Lowpass filters can be used, but normally you'll only find this in cases when the loop is constructed using passive components (mostly passive controlled self-oscillating class D amps) or when the designer intentionally wanted to limit loop gain at lower frequencies (e.g. UcD).

The traditional method for synthesising a deltasigma loop is thus:
1) One takes a chain of n integrators. Go easy on your math skills and start with a time constant of unity. This realises a loop function 1/s^n. This loop function is obviously not going to make a stable loop.
2) To make the loop stable, the transfer function must fold over from an nth order function to a 1st order at some frequency before the unity gain point. The loop gain looks like a steep downward slope of -n*20dB/dec, changing to a less steep slope of 20dB/dec shortly before the unity gain point. It is common to make this crossover using a butterworth function. This means that to the loop function a set of n-1 zeros is added distributed evenly along a circle of radius Wchangeover.
3) The zeros are practically realised by making a weighted sum across all integrator outputs. The loop function is of the form
(a1+a2*s+a3*s^2+ ... +an*s^(n-1))/s^n. Symbolically or numerically determine a[n] to get the zeros where you wanted them.
4) scale the whole function by a constant such as to get the unity point somewhere in the 1st order region as planned. Individual internal gains can be scaled (with retention of overall gain of course!) to optimise signal swings.

4) becomes moot when the circuit is a 1-bit converter. Gain will be determined automatically by the probability density function of the noise that comes out of the loop.

When you're designing a PWM system, usually the equation runs backward. First you set the switching frequency, from this follows the unity gain point, and from this the changeover frequency.
When you're designing a 1-bit converter, the choice of changeover frequency determines the maximum stable modulation index.

My own method produces somewhat more optimal coefficient sets, and works equally well with loop functions with complex poles (and can be used to include output filters), but is quite complicated to explain here.

[phase_accurate]

I once derived the maths to determine the coefficients for a given NTF for loop-orders up to five. I know that some programs can do this easily but I don't own one.

It is difficult to determine the cutuff frequency and order of an optimal NTF however but the calculation of the coefficients for a given NTF is trivial.

Something that isn't trivial (at least to my knowledge) is the determination of optimal integrator clipping levels for 1-bit modulators.

If someone is interested I can post my findings here.

Regards

Charles

[Pierre]

Bruno, when you talk about PWM I assume you talk about clock based amps. In that case, as you suggest, you determinte the sw. freq. and then the 0dB point.
I suppose you are trying to say that the 0dB point in the open loop function must be placed at <Fs/2, right?
Thanks

[Bruno Putzeys]

Originally posted by Pierre
when you talk about PWM I assume you talk about clock based amps. In that case, as you suggest, you determinte the sw. freq. and then the 0dB point.

A similar reasoning goes for self-oscillating amps, whereby self-oscillation is produced using hysteresis or a second turnover point at a higher frequency, transitioning to 3rd order rolloff (or 2nd order + prop delay).

Originally posted by Pierre
I suppose you are trying to say that the 0dB point in the open loop function must be placed at <Fs/2, right?

Yes. In practice, you will find you'll need to go even further down to Fs/3.

[digitoxin]

I don't know if higher order self-oscillating sigma-delta will work. If the whole thing is a system is a 2nd order integrator for example, there will be a phase shift of 180° at all frequencies above unity gain, so the whole thing can oscillate at any frequency (and will do so).

Also adding zeros will not change that for frequencies below the zero frequencies, so the oscillation frequency will just be kept below the frequencies of the zeros.

In my opinion, self oscillating converters will only work as a system of order 1.

digi

[Bruno Putzeys]

Originally posted by digitoxin
Also adding zeros will not change that for frequencies below the zero frequencies, so the oscillation frequency will just be kept below the frequencies of the zeros.

Not so. When you add a zero, phase shift below this frequency will converge asymptotically to 180 degrees. Above this frequency, phase shift will converge asymptotically to 90 degrees. In this state, the modulator will not oscillate at all. You will have to add delays or real poles at frequencies beyond the location of the zero to effect oscillation. In a sampled system, the delay is automatically present, in the form of one sample delay.

[digitoxin]

Not so. When you add a zero, phase shift below this frequency will converge asymptotically to 180 degrees. Above this frequency, phase shift will converge asymptotically to 90 degrees. In this state, the modulator will not oscillate at all. You will have to add delays or real poles at frequencies beyond the location of the zero to effect oscillation. In a sampled system, the delay is automatically present, in the form of one sample delay.

Yes, thats true. But my argument not about getting it to oscillate at some frequency (you can always throw in some poles), but that it is not possible to get oscillation out of the audio band in a real second order system.

I will refine my argument as such: The better noise suppression from a higher order sigma delta is because of the increased gain in the audio band. In the case 40db/dec is reached (against the 20db/dec of a first order system), the phase shift will be enough to start it oscillating. If it is lower (due to some pole/zero arragment and you are on the save side, there is hardly more gain compared to a straight first order system).

So, you might end up like something that looks like its second order, but in reality has not much more gain compared to a first order system (and will also have noise figures like a first order system)

For example: Real integrator (pole at zero freqency) + zero a little above the audio band: The phase shift at lower frequencies (nearly 180°) + a little delay (even jsut 100ns) will be enough to make it oscillate in the audio band, also the zero takes away some gain and makes it more like a first order system

Or a clever pole/zero arragment that will make a phase shift of 120° + a ripple around that value will also not work, because a ripple in the frequency domain is a delay in the time domain -> very bad.

On another note: I looked at the Ucd patent and i don't like what i see there.
Unless something has been done about this i see a great problem:
If a load is connected, everything is fine. But if there is no load present, the Q of the output filter will get very high, causing a huge phase shift at the pole frequencies and bring down the oscillation frequency. So, there will be a quite high output voltage and high reactive energy transfer in a no load no input condition, which is not nice at least. Especially in high power amps output voltages can be dangerously high when you don't expect anything on the output. Of course this only applies to real amps not active systems with a direct connection to the loudspeaker.

digi