Output devices?

[Mr Evil]

As an initial foray into class-D, I've been doing some simulations of a very simple circuit consisting of a triangle wave generator, a comparator and a couple of MOSFETS (surprisingly good simulation results from a circuit with only a handful of components in it).

The output stage is one N and one P-channel MOSFET - the simplest arrangement possible. The problem is finding a suitable pair of complementary devices. Ones sold for linear use often have their complements clearly marked. Ones for switching either don't have complements or it's not obvious what they are.

So what would make good output devices for various power levels? Perhaps it would be easier to use a bridge driver and use only N-channel MOSFETs?

And on a related note: Could IGBTs be used? How would they compare to MOSFETs?

[classd4sure]

Hi,

Using a P channel is a compromise, in order to be able to use simpler gate drivers.

You only get one advantage by using a P channel and that's ... the easier drive circuit. That one advantage costs you alot, mismatched capacitances, greater body diode drop, slower overall, higher Ron..

There's a number of reasons for all this but the main thing is they use holes as charge carriers, which is less efficient than N channel FETs, which use electrons.

I've seen some go for a much larger P channel in order to match Ron, and all other things be damned.

Ideally, you really want to use two N channels, only way for it to be truly symmetrical.

There's a good choice of high end drivers out there that will allow you to do it easily enough (non you can actually simulate with as far as I know), and if you look at the UCD circuits around here you'll see a discrete method which should provide some good insight as to how it's done discretely, and which do simulate easily enough.

Cheers,
Chris

[JohnW]

Hi 666,

I use the following devices for power levels to 120W 8 Ohms, the Siliconix devices being the best switchers - but the Fairchilds are very good. Devices are SMD, and require no heatsinking for the above Cont. power levels.

SUD15N06 / SUD10P06 Siliconix
Si7414DN / Si7415DN Siliconix

FDD5612, FDD5614 Fairchild

If anyones interrested I can post OPS circuits.

John

[classd4sure]

If anyones interrested I can post OPS circuits.

Joking? Yes please!

No one mentioned the IGBT, I've read they aren't usefull for frequencies above say 200khz.

Here's one I've been playing with.

[classd4sure]

Clicked the wrong link..

Here's the schematic

[JohnW]

Hi Chris,

As a recommendation, move R47 to the first EF pair – this will allow the second pair to offer a lower impedance to the Reverse Miller Charge. To this end, Q80 need only be a cheaper BC something…

Due to the EF voltage drops – you will probably need to Capacitor couple the Gate Drive, and return the Gate to nearer 0 volts. As FETs heat up, Vth reduces…

Will post circuits when I dig them up…

[classd4sure]

Hi John,

Would you only change q80 and leave q81 as is, just to add the "soft" dead time etc. Or change them both? I know keeping them all matched doesn't really matter but it's something I have to talk myself into Though, I had tried that many many posts ago and it simulated exceptionally well.

I love the idea of 0Vgs ability but.. the only way I can think of actually making capacitive coupling work envolves adding another resistor from gate to source, after the cap, otherwise gate voltage is no longer with respect to source. Then we have higher impedance seen by the miller charge again. Is there another way to do it?

I've seen other ways of generating even negative gate drive, type of charge pump, might look into that but I'm not sure how good it would be.


Regards

[JohnW]

The “killer” in switching Fets is Toff Delay. Ideally, you want as low pull-down impendence (fast) as you can (Toff), and have a “Soft” rising edge (Ton Gate drive) – but the reverse miller charge is also a problem – so the best solution is to have slower but low impedance rising edge, and a fast and low impedance as possible falling edge. That’s why its better to have the “soft” rise-time resistor in the proceeding EF pair – to a degree, the final stage EF’s provide a low impedance – slower rising edge and “buffer” the reverse Miller charge.

Inserting the resistor in the Emitter “unbalances” the circuit, so you might as well just us a lower current / gain device anyway.

Yes, you need to DC restore the Gate drive signal after AC coupling (Schottky & resistor), but the impedance of the Gate drive will not be adversely effected by the insertion of the capacitor – provided it has good RF qualities – I use “reverse format” types – 0612.

Another method to DC restore is to add a Zener diode across the coupling cap.

John

[JohnW]

Attached is a REAL simple “budget” 120W 8Ohm OPS in full bridge – it’s designed for “Home Cinema in a box type systems” – but THD is below 0.1%, and still manages to meet thermal requirements using SMD devices and just the PCB as heatsinking (although 4 Layers).

Its crude – but works better and provides higher power (cheaper) into 8 Ohms than “Integrated” OPS designs I've tried.

Note that the driver stage PSU rails are also AC coupled to the HBridge supplies to provide a low impedance Toff path between the Gate & Source of each FET and the Driver circuit.

The choice of “level” shift device (the Si1539), doesn’t have the lowest RDSon in the range – but can be switched fast with a single logic gate, without excessive cross-conduction.

Notice the “funky” crossed coupled Soft dead time circuit….

This circuit only works well with the SUD devices - which are very fast, I tried the Fairchild FDD5612 / 5614, but the Pch Toff delay is to long, resulting in an Iq of about 50mA per Half bridge

[JohnW]

“Ton” switching of the above circuit, slow – but no ringing – notice the “attack” by the reverse Miller charge as Gate reaches Vth – Hey common guys it’s a simple circuit – have any better / cheaper