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Old 7th September 2004, 02:07 PM   #11
JohnW is offline JohnW  Hong Kong
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OOOOPS,

Sorry I sent the wrong version of the PDF file for the Real Budget 100W OPS above, here's the correct one.

Iq with 15R shown, +/-22mA @ 384KHz, +/-25V
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File Type: pdf real budget 100w ops.pdf (29.9 KB, 241 views)
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Old 7th September 2004, 02:34 PM   #12
JohnW is offline JohnW  Hong Kong
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The first circuit “Real Simple OPS” full bridge,

And the second, a 250W+ 4Ohm OPS using leadless devices (in full bridge - not shown).

Note the Hard Deadtime resistors (R9 / R4) and the Soft Deadtime resistors (47R & 33R) should only be taken as guide values – as I don’t believe I updated the circuit diagram after “optimising” the circuit on the bench.

Also, a small drawing error, there should be 100pF capacitors to ground on the inputs to each NC7WZ04P6 - (so that’s 2 extra Caps to ground).

The above OPS is VERY fast, low distortion, and can provide incredible output power levels for output devices less then 3mm Sq – with no heat sinking!

John
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File Type: pdf simple bridge & fast ops.pdf (48.1 KB, 262 views)
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Old 9th September 2004, 11:33 AM   #13
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Hi,

Thanks, John, I'm sure that will give a good boost to alot of people.

My question is can the bjt followers take care of the miller charge, through the cap, without the 47kohm resistors causing a significant amount of gate step? Also, if so, would it hold true for even higher rails?

Thanks,

Chris
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Old 9th September 2004, 12:32 PM   #14
JohnW is offline JohnW  Hong Kong
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Hi Chris,

The 47K resistor function is only to keep the Gate "OFF" with no drive signal – DC restoration is performed by the Schottky diode. The reverse miller charge is an AC phenomenon, which is held into check by the low impedance return path to the driver stage.

Looking at the Pch device, the reverse Miller charge is coupled back into the driver stage via THREE capacitors! The first, the Gate capacitor, then the cap from HBridge to Positive driver supply, then lastly the Cap. from the Positive driver supply to Ground!

Where there is significant Miller Charge (such as with the Si7414DN), I couple the EF’s supply decoupling capacitor directly to the Source of the Output FET via 2 capacitors to allow the lowest impedance path in BOTH directions. One capacitor path for the Reverse Miller charge (connected to EF pair’s Ground connection), and the second to allow rapid Toff discharge (to the EF pair’s Positive supply). Decoupling capacitors are connected directly across the supply rails to the EF pair’s, level shift Fets & 04 inverters – which are not shown on the circuit diagrams for clarity.

I tend to always see a greater reverse Miller charge “spike” with the Nch devices, I believe this is due to there Lower Gate resistance (about 2.5 to 3 times lower then Pch devices). In the Pch devices, I believe their higher internal Gate resistance dissipates some of the “Spikes” energy – but this is only a “John’s - back of the mind theory”… However, the truth may lay somewhere else!

John
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Old 9th September 2004, 12:56 PM   #15
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Hi,

Great answer John, thanks. Seems like a much better idea to me now.
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Old 9th September 2004, 01:01 PM   #16
JohnW is offline JohnW  Hong Kong
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Quote:
Also, if so, would it hold true for even higher rails?
I don't recommend using Pch/Nch OPS above +/-27V due to the lack of Fast swtching Pch devices above 60V (this limits the power to about 140W Max 8ohms - full bridge).

Also the Pch RdsOn becomes an issue at higher power levels. The above Si7414/15 is good for 140W 8Ohms with no heatsink - just PCB mounted (about +45 Deg C above ambt. after 30 Min. at rated FULL power). Remember these OPS devices are JUST 3mm Sq!

Indeed, working with it these everyday, I tend to forget how good these OPS devices really are!

This is not a DC power supply, so with Real music the devices don't even appear to heat up! With the very fast switching, and correct Deadtime, switching losses are very low at 384KHz.

John
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Old 9th September 2004, 07:07 PM   #17
subwo1 is offline subwo1  United States
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Hello John, Chris, and all,
Well, I guess I will mention the idea I have been studying and doing some experiments with, seeing how John has introduced the use of SMD MOSFETs as outputs in a class D amplifier. Congratulations, JohnW.

I have built a test SMPS circuit using the fast switching IRF7492 SO-8 devices instead of full-sized MOSFETs. The results so far look good.

For an amplifier, I am considering using the IRF7490 operating on 45v rails. I would parallel at least two devices per supply rail for switching power to the speaker. The circuit may use an extra buffer after each usual MOSFET driver to reduce switching times. No heatsinks are involved like in JohnW's approach.

see IRF parametric table. Go to Discrete HEXFET Power Mosfet. Then check Package: SO-8, Polarity: N,
VBRdss: 100 - 300.

As some folks may recall, I suggested the notion of stacking components to eliminate circuit paths. That idea works well with the SO-8 devices. I would plan on the amplifier to have a bridged output (BTL = bridge tied load). The output power may be able to exceed 500w rms.

The eventual goal of big power from a small size may be attainable once class D switching frequencies break the 5mhz mark, since inductors can be smaller then. One limiting factor in downsizing and speeding up is the high frequency characteristics of (bypassing) capacitors. Bruno kindly brought up this problem in another thread.

Admittedly, since efficiency is of primary importance to me, I actually use only the highest frequency which requires virtually no heat sinking. This way switching losses are lessened.
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Old 9th September 2004, 11:03 PM   #18
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Quote:
Originally posted by subwo1
The eventual goal of big power from a small size may be attainable once class D switching frequencies break the 5mhz mark, since inductors can be smaller then. One limiting factor in downsizing and speeding up is the high frequency characteristics of (bypassing) capacitors. Bruno kindly brought up this problem in another thread.

Admittedly, since efficiency is of primary importance to me, I actually use only the highest frequency which requires virtually no heat sinking. This way switching losses are lessened.
Please be advised that mosfets subjected to too high a reapplied dv/dt may fail catastrophically. Not all mosfets are characterized for this parameter. Those that are, are typically rated for a dv/dt of few volts per nanosecond to a few tens of volts per nanosecond. Several years ago I attempted to use some Motorola devices that were unrated in this regard and found that they failed at dv/dt rates several orders of magnitude slower than this. Even though the data sheets looked as good or better than that of the IR part I wanted to replace, the Motorola parts were completely unsuitable for class d applications. (Since then, I think they have greatly improved their mosfet processing.)

The problem occurs when a mosfet is conducting moderate to substantial current in the reverse direction and is then called upon to support voltage in the forward direction. The reapplied dv/dt rating apparently goes down with temperature and with the magnitude of reapplied voltage (one manufacturer advised me that dv/dt would not be a concern if the parts were never used at more than 40 percent of their voltage rating).

In practical terms this dv/dt limit means that, in a totem pole configuration, there is a limit to how fast a mosfet may be turned on (but not turned off).

Regards -- analog(spiceman)
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Old 10th September 2004, 12:29 AM   #19
subwo1 is offline subwo1  United States
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Quote:
Originally posted by analogspiceman


The problem occurs when a mosfet is conducting moderate to substantial current in the reverse direction and is then called upon to support voltage in the forward direction. The reapplied dv/dt rating apparently goes down with temperature and with the magnitude of reapplied voltage (one manufacturer advised me that dv/dt would not be a concern if the parts were never used at more than 40 percent of their voltage rating).

In practical terms this dv/dt limit means that, in a totem pole configuration, there is a limit to how fast a mosfet may be turned on (but not turned off).

Regards -- analog(spiceman)
I am glad you added those caveats. I was thinking in terms of the rated rise and fall times as well as the turn-on and turn-off delays.

I make gate turn-off circuits have quite a bit more drive capability than turn-on ones so didn't think of the diode recovery problem. At least as the totem pole supply voltage is reduced, the Miller effect becomes less of a problem since the ratio of Vds to Vgs(th) goes down.

Technology has quite a way to go before high switching frequencies are practical. One help may be to place a 3 or 5 ampere Schottky diode parallel to the SO-8 MOSFET body diodes. Indeed body diode recovery is very important to consider.
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Old 21st September 2004, 10:30 PM   #20
Konrad is offline Konrad  Norway
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Driver, note the reverse diodes for the mosfets are important!
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