Distorsions in class D

[classd4sure]

Hi there,

Yeah IVX had a nice contribution, I'm still trying to make some more sense of it. My thanks to IVX as well.

I wouldn't mind studying the combined efforts of the DIYaudio community and construct a refined design which I theoretically understand so well that it is as though I have been bread boarding and experimenting with it myself.

Ahhhhhh.......I was dreaming of a community colaborative effort for much the same purpose (think Borg and their advanced technology ). That might be asking a bit much though.

Hopefully this thread will turn into something everyone (or almost) can benefit from for their designs/efforts.

Right now I'm looking for a model of a Max9690 or a similar part...I....have...to know
Regards,

Chris

[ChocoHolic]

...love this thread. Unfortunately, I was not able to go ahead with my
design considerations.... But I'll keep tracking this thread!
Great, thanks!!!

Bye
Markus

[subwo1]

The Max9690 has some appealing characteristics. You may be able to sub something like an LT1116 into the circuit. Then you may have an excuse to acquire LTspice to use for simulations since such models would then be readily available. I think that that LT comparator could give lower distortion, depending on your circuit, since it has a lower input offset figure, IIRC.

[classd4sure]

Hi!

Subwo1, Thanks for sugesting an alternative to the MAX9690, I looked around for awhile and came up with nothing I could simulate with so far. I'm not opposed to Ltspice, but I think I'm still just getting my feet wet with pspice. Anyway, I will put that plan on the back burner for a little while, still want to fix up basic UCD version. I know it can do better. Once I've beaten it or it's beaten me I just might rebuild with Ltspice for yet another comparison. I wonder if it will have the transistor selection I'm after though.

@Ivan, It seems you used additional filtering for your fourier tests, and it didn't really make much of a difference huh, that correlates well with my simulation as well. Very little, if no improvement with additional filtering in spice, I found it not worth the effort.

I also dont' capture data for the first few cycles. I run for 10 cycles of whatever frequency I want to test, and start capturing data for the FFT at 9 cycles.

I was wondering, and forgive me if I missed it, how many harmonics did you use to simulate with?

Normally I used less than 10, I just tried 100, and THD= 100%
-How does one decide this?

Something that's bothering me:

I virtually nullified the gross DC offset of -0.5 volts my circuit had.
When I say that I mean -0.01Vdc offset, so I now consider that to be no longer a problem, yet the results are far worse.

I'm now seeing ODD harmonics generated, up to 9Khz, at which point it flattens out and stays flat up to the switching frequency.

From what I just read, that makes sense, half bridges cancel even harmonics by treating both halves of the waves equally, and emphasises odd harmonics, but does this hold true for class D?

I'm not sure, because when I re-introduce the gross DC offset, I still see those odd harmonics. I dont' yet know where they came from, they weren't there before and I hadn't changed anything else. In class D what contributes to odd harmonic generation?

I intend on making some serious changes to the output and driver stages anyway, but I have no idea how or why they crept up on me, I couldn't even see the fundamental before, and had a nice flat line from 0 to Fs.

IVX, my results are worse, but once I know how many harmonics you used for your tests I'll try to duplicate them with my circuit for a comparison with pspice results, I think they'll be somewhat similar in effect. I'll get back to you all on this after a few pots of coffee and alot more work.

Regards,

Chris

[Pafi]

I'd try to find an explanation, if you gave me a digestable format of simulation, but this way I don't see anything of your problem.

Never mind, I don't even have time.

[classd4sure]

I've found the problem, working on a solution now.
Not asking for hand outs here, just trying to further my understanding.

As in, determine usefull tests for class d in spice, and understanding their limitations, in order to best optimise both them, and whatever circuit under them.

Sorry if I mislead with my rambling, my questions were,

1. How many harmonics to simulate THD with in spice/why?
2. What can induce odd harmonics in a class d type half bridge..

I very well may have one possible answer to that one by now, but can't say with any degree of certainty as I haven't yet solved the problem I found. I'll let you know when I do.

Thanks for your time,

Chris

[Bruno Putzeys]

I've designed one UcD amp (+/-100V, 38A power stage) with an AD790 instead of the discrete comparator. It is spectacular in that way that it oscillates correctly from +/-1V power supply upwards. The disadvantages are increased complexity getting it interfaced correctly to the driver (so the total number of parts is still the same) and about 10dB increased noise because of the comparator's large bandwidth.

I should redo that design with the discrete comparator but it's nearly finished now so I'll leave it as it is.

[Bruno Putzeys]

Originally posted by classd4sure
1. How many harmonics to simulate THD with in spice/why?
2. What can induce odd harmonics in a class d type half bridge..

1. You need a very small time step (1ns) in order to get the noise of the simulation down. That small time step will give you as many harmonics as you could ever want. Depending on the simulation tool it only makes sense to trust the first 5 or so.
e.g. Microcap: completely useless for class D simulation
Pspice (=orcad): rather precise results are possible.
To be honest, I've never simulated a complete amp. I do simulate when developing subcircuits though.

2. Unequal switching behaviour going up/down is the most obvious one.

[classd4sure]

Hi,

Neat, I take it the built in hysteresis isn't enough to affect it? Certainly a nice option, I'd have alot more luck interfacing properly than doing a good job of making that comparator. No doubt I'll be giving that a shot, see how they match up. No plans to abandon the discrete version though. Much to learn.

Orcad is what I'm abusing.

2. Unequal switching behaviour going up/down is the most obvious one

That's interesting because I was plagued with a half volt output offset which gave me serious unequal switching up/down, and so far, produced the very best results. Once I figured out how to power the comparator properly (I hope), offset was minimized, and that's when the odd harmonics showed up.

I backtracked a bit and re-tested with the gross offset, seems I'm stuck with those odd harmonics, nothing else was changed.

How about gross cross conduction? I know what I have to make happen to fix that, get the turn off driver working faster...nice balancing act!

It's already been improved somewhat....still a long way to go, not sure if it's helped those harmonics much yet.

I'm endlessly impressed with pspice simulating this at all, considering I started with EWB, it's a nice tool. I can trust it enough so far that I blame myself instead of the program, keeps me working at it, though I expect I'll hit that wall with it eventually.

I'm learning alot at any rate.

Regards,
Chris

[IVX]

WELL,WELL,WELL...
I did not sleep two nights, and came too late for my day job yesterday even... Below is result of my simulations:
MC7.16 1khz 0.004294%@20khz_band 0.006986%@60khz_band
MC7.16 10khz 0.000966%@20khz_band 0.003488%@30khz_band 0.004877%@60khz_band 0.005231%@200khz_band
Pspice9.2 1khz 0.00165%@20khz_band 0.00172%@60khz_band
Pspice9.2 10khz 0.00045%@20khz_band 0.004942%@30khz_band 0.00685%@60khz_band 0.00699%@200khz_band
comments will be soon.