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Class D Switching Power Amplifiers and Power D/A conversion

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Old 20th June 2004, 12:37 AM   #11
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High Pafi,
the 5us is the max allowed step size.
The spice algorithm uses smaller steps, whereever needed.
Even if you do not limit them 5us. But without limit the simulation sometimes gets unstable and convegrence is poor. Also the steps which psice really choose depend in a some way on that max limit....
You can see if the are to big when you check the traces, there the 800ns dead are perfectly displayed.....
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Old 20th June 2004, 12:47 AM   #12
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ok, some screen shots

At small signal levels the HF of the switching is of course making a noise floor which is higher than the audio signal. But this noise floor has its fundamental at 70kHz and should not be the resaon for the undesired signal with a frequency of 14kHz....


OK, I must sleep now...
Bye
Markus
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Old 20th June 2004, 12:48 AM   #13
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Hi,

Quote:
I didn't check your file, but note that time step must be lower than 7 ns, if you want 0,1% accuracy. Is it so now? I guess not. (Distortion on theoretically perfect PWM signal indicates imperfect simulation.)
In simulations I normally opt for a compromise between what looks like decent waves and total simulation time, so I keep the time step at 10ns. Should I perhaps change this for THD tests? They take awhile anyway.

A time step of 5uS must give you some ugly waves though, should try at least in the nano range for a THD test. If you can simulate with less harmonics you'll regain alot of the simulation speed you lost by alterting the time step like that. Seven harmonics is alot faster than 10 for example. Which brings us back to the question....how many is usefull?

There is another option in the THD settings "print values in the output file every X seconds", any recommendations for that?

Hi Subwo1
Quote:
Hello, I suspect that the low correlation between dead time and distortion is related to not using feedback. When the loop is closed, more dead time causes less synchronicity between the input and the feedback signals.
That kind of makes sense, I'm trying to visualize this effect..basically your saying the feedback would kind of amplify the deadtime effect..thereby increasing distortion..instead of cancelling it? Hmmm.....hard concept to grasp..at first. In this sense feedback worsens distortion rather than improves, hence the importance on minimizing, and I assume matching deadtimes.

Very good, thank you.

Chris
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Old 20th June 2004, 12:49 AM   #14
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Marcus!

I didn't mean 0,1% distortion, I mean 0,1% accuracy. (0,1% of the amplitude of triangle. This means 1% distortion at 10% output level.)

You can use higher modulation freq. to lower the simulation time. The distortion doesn't depend on frequency too much. (If there is no feedback.)

(I have a Celeron 366, and I have never had any serious problem on simulation time.)
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Old 20th June 2004, 12:51 AM   #15
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...somehow the screenshots got lost

trying again...
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Old 20th June 2004, 01:02 AM   #16
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Hi Pafi,

Good seeing you,

Quote:
This means 1% distortion at 10% output level.
Just curious as to how you work that out?

Good point about speeding up simulations times by increasing frequency, it does do wonders. However when I do THD simulations I use 1khz "center" frequency in order to try and maintain some standard in conjuction with everyone elses tests, this way I have a better feeling regarding the value of the results.
What do you think? Would there be any reason to use other "center" frequencies as well, aside from simulation speed?

Thank you,
Chris

PS: Some good movies on tonight so I'm out for a little while at least, yet thank all participants, and am very glad this thread is off to a great start!
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Old 20th June 2004, 01:27 AM   #17
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Hi Chris!

Assuming the error is constant, distortion is inverse proportional to signal level. 0,1% at full load is just an estimation based on phase-amplitude conversion of triangle-wave. T/2=7us means peak-to-peak, therefore 7 ns means 0,1% error (+/-6dB )

"Would there be any reason to use other "center" frequencies as well, aside from simulation speed?"

Definitely! For example Markus use 200 Hz, because he make the amp for a sub-bass box. Other reasons can be found (professional high-speed OPAs measured at 1 or 5 MHz), but I have to sleep too now!

Markus!

OK, spice may use smaller time-steps, but you can never know if they are small enough.
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Old 20th June 2004, 07:00 AM   #18
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Hi Pafi!
... hope you had a better sleep,,,
Thanks, you are right.
To allow 5us step is to huge.
The traces in the probe window are looking fine, but the FFT is running mad.... For me it is not obvious, why the FFT is giving really crazy results (not only some single percent wrong, but 40%.. !!!), while the probe traces are looking fine....

Anyway I reduced the step size to 5ns and spice world is looking more or less reasonable now. I am attaching the new output-text-file.

THANKS A LOT!
Markus


P.S.
My simulation philsophy:
For the first steps I am going to investigate the principle.
Here I often use ideal components, from which I know their behaviour very well. Also this helps to speed up simulation and I can spend the processors math power to simulate fundamental circuit properties like the planned switching, dead time etc...
With that model then I am typically just playing around.
Picking 100 harmonics instead of 10 was also just "playing". In the past I often found real weaknesses, before they could blow the real circuit later. But of course sometimes you are getting tricked by simulation... as it happened to me yesterday...
OK, I will keep in mind: Even if the probe traces are looking fine, even then the steps can still be to huge....
By the way: I was wondering about Randy Slone's Audio Amplifier construction manual, some months ago. He is showing tons of simulation results, where already the probe traces are showing obviously long simulation steps (especially chapter 7, cross over distorsion)....
Attached Files
File Type: txt pwm_5ns.txt (20.4 KB, 35 views)
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Old 20th June 2004, 11:05 AM   #19
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Hi Markus!

You're welcome! I just woke up. :-) I like simulating with ideal components or simplified modells for first step too! At PWM this is the most I can, because no simulaton program capable of simulate well my real circuit. (At least I don't know one.)

In continous operation time step is not so big problem. If time step is 1/500 of period, then simulation is perfect. (In PWM too, but here the period is the carrier's one, instead of base-band signal!)

I think explanation of bad result is that FFT algorithm can't handle varying time-steps. It need all of the points. Or sampling rate was too small. It must be over 200*f_carrier (yes, 14 MHz at least)! If you were filter first, then sampling rate could be lower.
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Old 20th June 2004, 11:46 AM   #20
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Hi,

I had implemented additional output filtering in my simulation using one the ABM low pass block. It did it's job that was evident from viewing the output, had placed cut off around 50Khz.

With my circuit harmonic distortion should be flat, then you see a peak at the switching frequency, I found it curious this additional filtering didn't remove this switching distortion from the FFT results? Or any of it's harmonics after it. Spice weakness?

Also, it's clear to me I need to read up on acoustics and frequency domain signal analysis, Can anyone recommend a good link for that sort of info?

Thanks,
Chris
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