Distorsions in class D

[ChocoHolic]

Hi Charles,
....some time ago, I observed a similar unexpected perfect stable behaviour when I was playing around with the ideal gain device and had set extremely high gains there...!!!???!!!

...no idea why...


Bye
Markus

[phase_accurate]

Enclosed you will find the simulation of a simple carrier-based amp with feedback-takeoff from the filter (of course) and a (deliberately low !!!!) switching frequency of 250 kHz.
As comparator/output stage I used the aforementioned "etable" from PSPICE.
NFB is 20 dB up to approx 10 kHz, where it starts to drop wit 6 dB/octave, reaching the unity-gain point at 100 kHz approx.
The overall cutoff frequency is around 45 kHz. k3 is slightly below 0.1%. But it has a little high k5 and k7.

Regards

Charles

[Jaka Racman]

Hi Charles,

I think it is nothing unusal that you have such a large gain in AC analysis with your circuit. I think spice uses full gain of your Etable element when setting operational point for AC analysis, where gain in fact should be Vlim/Vramp. I will try to find and post some links for averaged models for carrier based PWM stages, but I would still like to know how AC model for hysteretic type oscillator would look like. Maybe this link would be a first starting point.

Best regards,

Jaka Racman

[Bruno Putzeys]

I'm packing for a week off and doing some other stuff...

In short, the gain of a self-oscillating power stage calculates similarly to that of a fixed frequency one. The patent shows how to transplant the reasoning used on fixed frequency amps onto the self-oscillating one. There's a slight error in the maths, the actual gain equation is significantly more elegant, as I hope you'll find out.

Point is, the carrier imposes a certain dvdt on the comparator input at the zero crossings. An input voltage is converted to a switching time change as per the dvdt.

[ChocoHolic]

Bye Bruno,
enjoy the days off !!

[phase_accurate]

The gain from the modulator to the output of the switching stage is determined by

A = (output-stage supply-voltage)/(peak voltage of triangle)

The combined gain of a hysteresis-controlled modulator & output stage is determined by

A = (output-stage supply-voltage)/(0.5 * hysteresis-voltage)

In both cases a half-bridge is assumed, for full-bridge it is twice as much.

If you run AC analysis you best model the whole as a voltage-controlled voltage source with gain A determined with the above formulae.

Regards

Charles

[ChocoHolic]

Hi Charles!
Yes, I see the same.
My personal favourite to simulate is the ideal gain device.
I use the voltage controled voltage source only if I need isolation between output and input.

But I am wondering if pspice is able to notice gain A in the correct way as described by you, if it has to caculate a switching bridge (not modeled as a gain or voltage-voltage-source), but AC analysis is chosen....
Couldn't it happen that PSPICE simply calculates the linear small signal forward gains of each stage, without taking care about hysteresis and DC rail? From which caculation (except transient) can PSPICE notice the value of hysteresis...?????

Bye
Markus

[phase_accurate]

From which caculation (except transient) can PSPICE notice the value of hysteresis...?????

From nowhere, I assume, and that's why I wonder that it works at all without using an ideal gain-stage for AC analysis !

Regards

Charles

[ChocoHolic]

...let's wonder together !

...must be some inside PSPICE...

Cheers
Markus

[classd4sure]

Hi,

I've recently come to the same conclusion

Regards,
Chris