Distorsions in class D

[ChocoHolic]

The overall design is as simple as I never thought, that it could be possible. Just two transistors, some resistors, one cap and a full bridge. COOL!!!
The simplified full bridge should reflect quite good the behavoiur of my plans with the LM5104 driven bridge. In some months I can give a comment about that driver chips and how their adaptive dead time is working. For shut down, I am planning to trigger a latch which pulls down the supply voltage of the LM5104 to a value short below under the treshold of the UVLO. Under this condition the gates of the Mosfets will pulled down.... Let's see how it will work.

Bye
Markus

[ChocoHolic]

...with respect to the idea of an ironless choke...
I calculated an simple plastic torroid.
Dimension of the plastic core:
Outer diameter: 50mm
Inner diameter: 30mm
Height: 20mm

The basic formula
L=µ0 x µr x A x N^2 / le
leads to about 100 turns if you want 40µH....

Well sounds possible, but not very practical....
A ferrite solution is smaller and less lossy.

[Bruno Putzeys]

Yup... Went down the same road not so long ago. I was looking for an air coil that wouldn't produce a significant external field. Arrived at the same conclusion: too many turns. It looked so promising

[classd4sure]

Hi,

In the rare instances that I perform time-domain simulations, I do so with an "idealised" power stage. I don't ever simulate complete amps.

As for myself, it's a learning experience, and I would never have learnt anything regarding charge ratio/body diode recovery etc playing around with ideal switch devices in spice. Let alone even on how to drive one properly.

That said, now that I'd like to see how well it can work without any associated hassles brought on by the mosfets and their poor modeling, aaaand that I finally have a very straightforward example of how to use an ideal switch as a mosfet, thanks to Markus, I will be giving that a try as well.

Markus, looks like it's comming along great! I will have to try this.

Regards,
Chris

[ChocoHolic]

Hi Chris!

If you use the sbreak devices:
Please note that their default values are often not suitable.
Ron = 1 Ohm
Roff = 1 E6 Ohms

But you can easily change this in the "breakout.lib".
breakout.lib can be opened with most text editors
like Wordpad etc...
In this text file you must look for the model of the sbreak and
there you can change the default value. Depending on the PSPICE based program and version you can sometimes change the properties more comfortable, but the text editor should work always.....
The sbreak changes its resistance from Roff towards Ron by a nonlinear function of the voltage, which is applied to the control pins.
0V ==> Roff (negative voltages ==> also Roff)
1V ==> Ron (higher control volatge ==> also Ron)

Please note also that convergence of the simulation algorithm is getting more difficult as higher the ratio Roff/Ron is chosen.

For my simulation, I changed Ron to 0.032 Ohms which corresponds to the IRFB52N15D...

I also appreciate simulation to learn about some basics.
But for detailed optimization it is not well suited.

Good Luck
Markus

[classd4sure]

Hi Markus!

Many thanks for those tips that should make life alot easier. What threw me before was not having thought of adding the Vth to the control pin, and instead tried to implement it by editing the on/off thresholds of the device which didn't seem to work well at all. Seems so much more straightfoward to just add a DC source like you've done.

Thanks again.

Chris

[Jaka Racman]

Hi Bruno,

In the rare instances that I perform time-domain simulations, I do so with an "idealised" power stage. I don't ever simulate complete amps.

From the above quote it might be understood that you mostly simulate in frequency domain. While I am familiar with averaged switching stage models from Dr. Ray Ridley for classic PWM stages, I am interested what type of model do you use for self oscillating power stages. In rare occasions when i simulated in frequency domain, I simply used amplitude limited E source and that seemed to do the trick. But I am not absolutely sure if that is the proper way.

Best regards,

Jaka Racman

[phase_accurate]

For the simulation of ideal power stages I use the "etable" element in PSPICE.

Regards

Charles

[Jaka Racman]

Thanks Charles,

I suppose it works for you both in time and frequency domain?

Best regards,

Jaka Racman

[phase_accurate]

I suppose it works for you both in time and frequency domain?

To me it looks actually quite strange, but yes it does. The "etable" is basically a voltage controlled voltage source that allows some parameters to be set. I set it in a way that it acts like a stage with very high gain and a min and max output voltage of the desired p-p voltage.

The strange thing is that it has veeeeeeery high gain for the AC simulations in that case; and that's where I have problems understanding it. Simulated circuits, that should theoretically be unstable, behave nicely But maybe I just make a thinking error.....

Regards

Charles