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Old 14th April 2015, 06:04 PM   #1
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Default GaN once more

This is looking :
http://www.ti.com/lit/ds/symlink/lmg5200.pdf

History of GaN promises over the last 5 years was really annoying.
Keeping fingers crossed that the technology has now reached a
satisfying maturity.
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Old 15th April 2015, 07:22 PM   #2
stoc005 is offline stoc005  United States
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Still a difficult package for the DIY folks building stuff in the basement. At least they have the correct gate driver on the device, which is a absolute must have.
I work with SMD all day and even with all the fancy tools I have for dealing with tiny parts down to 0201, I have a hard time with BGA and other leadless power packages like those used for this part. No, we don't own a BGA rework station since it costs a bit more than 15K USD but I wish we did.
GaN could have gone a bit further if they'd have offered a few parts in TO-220 instead of those basically solder bumped dies. I'd even take D-PAK.
Class D with GaN is a very natural application for these parts.

What? 35.00 USD each. FAIL.

Last edited by stoc005; 15th April 2015 at 07:45 PM. Reason: fix'n it
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Old 15th April 2015, 08:45 PM   #3
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Quote:
Originally Posted by stoc005 View Post
....? 35.00 USD each. FAIL.
Yup, yesterday night I came to the same conclusion.
Originally I planned to simply order 10 pieces with my next order at mouser for playing around. But at mouser it's 45,- EUR / pc.
Ok, I am not in desperate need.
Topic postponed until it becomes available without such political pricing.
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Old 18th April 2015, 11:24 AM   #4
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What exactly the benefit Use GaN in ClassD ?
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Old 18th April 2015, 12:49 PM   #5
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GaN is inherently much faster than silicon. This allows higher switching speeds, or less time spent in the transition region for the same switching speed. This allows higher efficiency power supplies and class D amps than silicon.

GaN is inherently more costly than silicon, and as of two years ago when I spent some time looking at GaN devices for LTE transmitters, GaN devices must be made on top of another type of substrate, usually SiC or glass. This raises the thermal resistance, making it harder to get the heat out of the package. Early RF devices from RFMD and Nitronex were prone to failure due to "hot spotting" if operated continuously in the linear region.
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Old 19th April 2015, 10:52 AM   #6
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What about SiC ?
Why nobody seem use Sic for Class D ? (sorry if I not aware about people works)
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Last edited by Rembulan; 19th April 2015 at 11:02 AM.
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Old 20th April 2015, 07:14 PM   #7
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SiC has the focus on devices for 600V and above.
The body diodes have reasonably low Qrr, but very high Vf.

GaN is also attractive for lower voltages.
There are no body diodes (except cascode arrangement).
Inherently backwards path is being opened by the field between gate & drain,
this also leads to a higher voltage drop than a MosFet body diode, but the great thing is that there is no Qrr.
For general GaN info read here:
EPC -Tools and Design Support
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Old 20th April 2015, 07:48 PM   #8
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When you look through EPC's handful of app notes you quickly realize why they don't even try offering a packaged version of the die. They explain how 1nH of lead inductance is one too many.

Unfortunately, attempting to accommodate their 3 dimensional multi-layer board layout suggestions without using an aerospace/mil quality board house is just about impossible. Even getting 2 ounce copper double sided and vias small enough to lead the current in from both sides of the die as is shown in the recommended layouts would be surprising. One ounce copper single sided trace leads coming at the source and drain bumps each from only one side might not just ruin the inductance cancellation plan, they might fuse before allowing rated die current. I haven't calculated the current density, but ~200um width and 5 amps per trace seems a little high, especially since the traces at that area will be pretty much at die temperature. ..and that's just for the steady state current rating.

Last edited by Andrew Eckhardt; 20th April 2015 at 07:54 PM.
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Old 20th April 2015, 09:03 PM   #9
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Played a few hours with the EPC devices when they came out, but had to
accept that they where mostly unusable with my DIY approach for various reasons.

Quote:
Originally Posted by Andrew Eckhardt View Post
.... how 1nH of lead inductance is one too many....
... just ruin the inductance cancellation plan...
Parasitic inductances + mechanical reasons + signal integrity of the gate drive is the reason why I think the LMG5200 is pretty promising.
However without samples its all just hot air
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Old 28th April 2015, 11:17 PM   #10
scolino is offline scolino  United States
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GaN has all of the advantages as advertised and provides excellent linearity of the open loop amplifier. Packaging a die only adds bad things - inductance, cost, resistance, size, reliability risk. Wafer level packaging is expanding rapidly in both discrete and IC devices. Mounting is quite easy. You need a little (very little) tacky flux, tweezers, and a heat gun. For a very thick board, you may need a hot plate or a heat source from the back. Smear a tiny bit of tacky flux, place the device, and blow hot air. Details and video are in Assembly Basics
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